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C/C++]
digital radio.rar
BU2614 combining 8051 the PLL procedures, by an ordinary remote control to operate.
Category:
SCM Upload User：
xznfcp Size：
58K
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PPT]
clock_system_of_LPC23xx.rar
LPC23xx Series ARM clock source selection, PLL settings, as well as attention to matters such as these. PPT doing very well.
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VHDL]
formatter.rar
Actel basic VHDL source code modules, including BCD, LCD, PLL, etc.
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VHDL]
DE2_VGA3.zip
... . The random number generators for x and y steps are XOR feedback shift registers (see also Hamblen, Appendix A). The VGA driver, PLL, and reset controller from the DE2 CDROM are necessary to compile this example. Note that you must push KEY0 to start the ...
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VHDL]
sgs32.rar
... , is able to add 4-way, phase adjustable, adjustable frequency, adjustable duty cycle. See readme.doc. Here only provide a source module that contains the top-level sub-modules sgs32.v settings dds.v and pll module altp.v and waveform-driven document
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SCM Upload User：
zhangwj668 Size：
59K
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C/C++]
xc226x_ds_v2.1_2008_08.rar
... . Optimized
peripherals can be adapted flexibly to meet the application requirements. These
derivatives utilize clock generation via PLL and internal or external clock sources. Onchip
memory modules include program Flash, program RAM, and data RAM.
Category:
SCM Upload User：
wenhuixuan Size：
955K
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C/C++]
PLL.rar
Can be achieved automatically PLL function C source code modules,
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C/C++]
DSP_C_Function.rar
... , Aliasing, AM, DFT, Dotp4, dotp4clasm, Dotpintrinsic, Dotpipedfix, Dotpnp, Echo_control, Factclasm, Fastconvosim, FFTsinetable , FIR_pcm, FIRcirc_ext, loop_intr_pcm, Noise_gen, Twosumlasmfloat, sweep8000, SinegenDE, Scram16k, PLL. and so on nearly 100
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C/C++]
TEA5767_C51.rar
... or three-wire interface control, that I am using the I2C, single-chip with STC89C52, with 1K EEPROM, can be kept down to Taiwan, 1602LCD show here TEA5767 only to the control procedures, TEA5767 to read and write data is 5 bytes, which PLL parameters 14.
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