PLL code resource search result, page 17, Verysource

[PDF] pll_verilog.rar verilog model of a PLL
Category: Development Research Upload User：dq031136 Size：132K
[VHDL] PLLTEST.zip Altera Quartus to Pll Source
Category: VHDL-FPGA-Verilog Upload User：pangli0000 Size：378K
[C/C++] Memtest.rar nios sram memtest, with pll sopc code
Category: Embeded-SCM Develop Upload User：tengzhen04 Size：12K
[Others] pll_verilog_code.rar This is a period of pll verilog code, yes I reprint!
Category: VHDL-FPGA-Verilog Upload User：boai618 Size：3K
[C/C++] adc.zip This example sets up the PLL in x10/2 mode, divides SYSCLKOUT by six to reach a 25Mhz HSPCLK (assuming a 30Mhz XCLKIN). The clock divider in the ADC is not used so that the ADC will see the 25Mhz on the HSPCLK. Interrupts are enabled and the EVA is ...
Category: SCM Upload User：fan912520 Size：3K
[Matlab] PLL_IN_MATLAB.rar PLL in Matlab for FM Demodulation
Category: 3G develop Upload User：wnxn126 Size：360K
[VHDL] shuzisuoxiang.rar ... , and many other fields has been extremely wide range of applications. With the traditional analog circuit implementation of the PLL in comparison, DPLL with high accuracy, free from the impact of temperature and voltage, loop bandwidth and center ...
Category: VHDL-FPGA-Verilog Upload User：kunzhei Size：1K
[C/C++] radio_mv114_kst.rar /* note: this program is for self tuned radio MV114, MV014, MV011*/ /* PLL IC: LC72131, TUNER IC: LA1844*/ /* state=FM AM mode*/
Category: DVD Upload User：gdszzhy Size：10K
[Windows_Unix] pll_tools.zip pll simulink models for practical nad basic understanding
Category: Windows Develop Upload User：tanmeirose Size：7K
[C/C++] freescale.rar Freescale' s Smart car routine, including the functional blocks: PLL, PWM, I2C, SCI, FLASH, E2PROM, LCD, etc.
Category: SCM Upload User：leiwei Size：1240K

keyword: PLL