verilog code resource search result, page 69, Verysource

[VHDL] DDR_SDRAM_Contraller A DDR SDRAM contraller sample descripte in Verilog HDL ,base on Xilinx FPGA
Category: VHDL-FPGA-Verilog Upload User：hzaks888 Size：464K
[VHDL] LMS_filter.rar LMS filter using verilog HDL language
Category: VHDL-FPGA-Verilog Upload User：jtxdec Size：342K
[VHDL] ebook_verilog_fine_state_machine.zip ... common task for a digital logic engineer. This paper discusses a variety of issues regarding FSM design using Synopsys Design Compiler. Verilog and VHDL coding styles are presented, and different methodologies are compared using real-world examples.
Category: VHDL-FPGA-Verilog Upload User：bjxdktwx Size：119K
[VHDL] uart_nbit.rar Verilog language used to write serial communication program, including the sending and receiving two modules can be used for FPGA communications, you can send and receive through the program to set the number of bits, there is a very good scalability.
Category: VHDL-FPGA-Verilog Upload User：luqixin008 Size：3K
[Others] verilog_source_insight_clf.rar SOURCE INSIGHT verilog syntax of plug-ins, SOURCE INSIGHT done automatically, and other support functions, is a good language editing hardware analyzers
Category: VHDL-FPGA-Verilog Upload User：hhy9292 Size：3K
[PDF] Verilog_shuzi_xitong_sheji_jiaocheng.rar Verilog Digital System Design Tutorial BUAA, and good!
Category: VHDL-FPGA-Verilog Upload User：lchjwfgg Size：22259K
[VHDL] jsq.rar This procedure for 24-hour timer, stable error-free. Easy-to-use, is the Verilog HDL language beginners guide.
Category: VHDL-FPGA-Verilog Upload User：hszxxj Size：1K
[Unix_Linux] sorce.rar a good use of the Verilog Programming cpu procedures, we must make good use of.
Category: VHDL-FPGA-Verilog Upload User：ccon882003 Size：6K
[VHDL] Advanced_verilog_coding.rar Senior verilog programming lecture notes, handouts in English
Category: VHDL-FPGA-Verilog Upload User：fengwu86 Size：893K
[Others] verilog_example.rar verilog examples of resources are very useful for beginners.
Category: VHDL-FPGA-Verilog Upload User：hbclqg Size：91K

keyword: verilog