verilog code resource search result, page 74, Verysource

[Others] final_code.rar mining source code written in Verilog
Category: VHDL-FPGA-Verilog Upload User：jsi1950 Size：21K
[TEXT] Butterworth_IIR_Filter.rar DSP in the design of Butterworth filter prepared to use Verilog.
Category: VHDL-FPGA-Verilog Upload User：taipingli Size：96K
[Unix_Linux] crc_16.rar Cyclic Redundancy Check, crc_16, mainly used in digital communications systems. Prepared with Verilog HDL.
Category: VHDL-FPGA-Verilog Upload User：shzunxin Size：31K
[Others] veriloghdlQuickStart.Zip Verilog HDL Quick Start, which contains many useful hardware description language procedures
Category: VHDL-FPGA-Verilog Upload User：hakdiytb Size：363K
[MultiPlatform] unicef.orguploadprocedures.Rar write CRC codec procedures, collating documents, compressed files both theoretical statements, and the active code. Source code format C, VHDL, Verilog.
Category: VHDL-FPGA-Verilog Upload User：szgobo Size：690K
[MultiPlatform] Evita_Verilog.rar Verilog very handy and easy to teaching software.
Category: VHDL-FPGA-Verilog Upload User：xmxycs Size：3685K
[Others] time_clock.rar practical alarm the Verilog code. VHDL is not! After certification ldv
Category: VHDL-FPGA-Verilog Upload User：jnsmjxjf Size：4K
[Others] cal_verilog.rar calculator chips to achieve the Verilog code! Timing simulation success
Category: VHDL-FPGA-Verilog Upload User：yurongxun Size：6K
[Others] 8bitsine.rar 8bit sampling sine wave generator, a total of two papers, each with VHDL and VERILOG preparation, communications development platform dedicated
Category: VHDL-FPGA-Verilog Upload User：runchen666 Size：5K
[Others] RISC.rar hrisc cpu why only VHDL choice? We all use the Verilog ah
Category: VHDL-FPGA-Verilog Upload User：baijia Size：125K

keyword: verilog