verilog code resource search result, page 65, Verysource

[Others] chap3.rar Based on some of the procedures Quartus Verilog are still quite useful
Category: VHDL-FPGA-Verilog Upload User：dke2006 Size：6K
[C/C++] IEEE Std 1364.1-2002 IEEE Std. 1364.1 - 2002 IEEE IEEE Std 1364.1-2002 IEEE Std. 1364.1- 2002 IEEE Standard for Verilog Register Transfer Level Synthesis.rar
Category: VHDL-FPGA-Verilog Upload User：jianxn Size：372K
[Others] usb1.1_Verilog.rar USB1.1 IP core for device control, written with hardware describing language of Verilog.
Category: VHDL-FPGA-Verilog Upload User：tjdsgg Size：129K
[MultiPlatform] max2work.rar Verilog prepared practical multi-function electronic Table
Category: VHDL-FPGA-Verilog Upload User：long750105 Size：276K
[MultiPlatform] MYCPU2.0.rar used in the preparation of Verilog FLEX10K achieve simple CPU
Category: VHDL-FPGA-Verilog Upload User：zanxiaoxl Size：25K
[MultiPlatform] flowadd.rar 32-bit Floating Point Addition Written in Verilog
Category: VHDL-FPGA-Verilog Upload User：szulzp Size：1K
[MultiPlatform] cuart.zip verilog programme of serial port
Category: VHDL-FPGA-Verilog Upload User：dffelt Size：5K
[MultiPlatform] percent.zip Verilog prepared by calculating the percentage module
Category: VHDL-FPGA-Verilog Upload User：yulivip Size：91K
[MultiPlatform] pipe.zip Verilog modules prepared by the Pipeline
Category: VHDL-FPGA-Verilog Upload User：hbszzs Size：5K
[MultiPlatform] alu.zip Verilog modules prepared by the ALU
Category: VHDL-FPGA-Verilog Upload User：xiecaij Size：1K

keyword: verilog