verilog code resource search result, page 92, Verysource

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[Others] !061210[1].pdf.rar FPGA-based hardware and software asynchronous FIFO to achieve, through the Verilog programming downloaded to the FPGA chip after
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[Others] user_logic_Open_I2C.rar iic implementation, verilog achieved using standard protocols IIC function
Category: VHDL-FPGA-Verilog Upload User：clmm_385 Size：13K
[MultiPlatform] 601792346200732319490634862.rar jpeg DCT compression algorithm verilog code BUTTERFLY
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[C/C++] licheng.rar Verilog the procedures for scanning into the keyboard, then were sent to 51 micro-processing procedures.
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[Others] magnitude.zip Verilog HDL : For a vector magnitude (a, b), the magnitude representation is the following : A common approach to implementing thes e arithmetic functions is to use the Coordinate Rotation Digital Computer (CORDIC) algorithm. The CORDIC algorithm ...
Category: VHDL-FPGA-Verilog Upload User：wangchaosh Size：13K
[Others] ModelProjects.rar image processing to achieve the level of Verilog, contains seven key documents
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[Others] DCTofJPEG.rar verilog code written using JPEG compression core module DCT's butterfly modules algorithm
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[Others] shzzh.rar This is the FPGA to achieve the digital clock function with verilog programming language, compiler has merits and demerits. Simulation
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[Others] RiscCpu.rar verilog prepared with the risc mcu
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keyword: verilog