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Others]
qep_data_bus.rar
address bus interface based on the four frequency signal encoder interface FPGA Verilog HDL
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MultiPlatform]
dianti.rar
Verilog maxpuls2 under development in the elevator controller files (including code), It showed very detailed
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MultiPlatform]
washmachine.rar
in MAXPULS II environment, using Verilog development of the automatic washing machine control procedures, the MAXPULS can be directly through the compiler
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WORD]
ccpu.rar
this is a done VERILOG eight functional weak CPU
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MultiPlatform]
ad_DCT.rar
Verilog Programming is based on the test documents Lookup structure for a discrete cosine transform Extra Source : opencores
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MultiPlatform]
run_length_coding.rar
using Verilog prepared for image compression coding using length encoding (run leng thencoding, RLE) on the exchange coefficient (Aa) coding.