verilog code resource search result, page 24, Verysource

[VHDL] zigzag_decode.rar FPGA for the anti-Z transform algorithm of Verilog code. Can be used in JPEG and MPEG compression algorithms.
Category: VHDL-FPGA-Verilog Upload User：lah58889 Size：4K
[VHDL] Viterbi_RAKE.rar This is a description language with verilog viterbi decoding and rake receiver of the article, very practical, here are grateful for this article was
Category: VHDL-FPGA-Verilog Upload User：piaoyu228 Size：8631K
[Others] 7led.rar dp_xiliux the CPLD Verilog design experiments, 7 LED demo. code test.
Category: VHDL-FPGA-Verilog Upload User：lylyly520 Size：89K
[VHDL] clock.rar dp_xiliux the CPLD Verilog design experiments, clock demo. code test.
Category: VHDL-FPGA-Verilog Upload User：tfsbgs Size：79K
[VHDL] ledwater.rar dp_xiliux the CPLD Verilog design experiments, water lamp demonstration. code test.
Category: VHDL-FPGA-Verilog Upload User：lywusy Size：41K
[VHDL] rs232.rar dp_xiliux the CPLD Verilog design experiments, serial presentation. code test.
Category: VHDL-FPGA-Verilog Upload User：hero_cn Size：120K
[VHDL] Verilogbasic.rar Verilog entry basis, as well as introduce a simple programming, verilog in recent years the rapid development of a hardware language
Category: VHDL-FPGA-Verilog Upload User：pbfree Size：284K
[PPT] Verilog_PPT.rar Shanghai University Verilog PPT look recommended for beginners
Category: VHDL-FPGA-Verilog Upload User：lhs121 Size：2422K
[VHDL] ethernet_tri_mode.tar.gz Using FPGA verilog hdl realize Gigabit Ethernet MAC.
Category: VHDL-FPGA-Verilog Upload User：waytide Size：723K
[VHDL] match_rec.rar 脢鹿脫脙VERILOG脢渭脧脰QPSK脨脜潞脜渭脛脝楼脜盲脗脣虏篓拢卢露脭没潞脜鹿媒虏脡脩霉脗脢脦陋 4 拢卢脭脷鲁脤脨貌脰脨脡猫露篓脧脿鹿脴氓渭脛录矛虏芒脙脜脧脼脦陋 3
Category: VHDL-FPGA-Verilog Upload User：huaxing998 Size：209K

keyword: verilog