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keyword: verilog

  • [VHDL] HDB3.rar Using verilog HDL language, through a 4-bit shift register realization of a signal into HDB3 code and test
    Category: VHDL-FPGA-Verilog Upload User：gzxhlb Size：1K
  • [VHDL] ALU_verilog.rar Verilog languages with four arithmetic logic unit ALU, functional reference to 74,181, including. V documents and testing. Vwf document
    Category: VHDL-FPGA-Verilog Upload User：ledlight68 Size：2K
  • [VHDL] telephone.rar The use of public telephones were verilog language design include the following states: hang up, standby, identification, change passwords, call the five states. Includes a detailed source code as well as the design process, the module
    Category: VHDL-FPGA-Verilog Upload User：wolong Size：389K
  • [VHDL] VerilogHDLcourse.rar Verilog digital system design tutorials, e-books by XIA Yu-Wen
    Category: VHDL-FPGA-Verilog Upload User：shzlyb Size：22273K
  • [VHDL] Frequency_divider.rar With VERILOG HDL realize arbitrary frequency divider source code, is a generic procedure
    Category: VHDL-FPGA-Verilog Upload User：knanpd Size：131K
  • [VHDL] gate.rar call Verilog gate-level circuit of the experimental procedures, to achieve a gate-level ship-mode
    Category: VHDL-FPGA-Verilog Upload User：goft1985 Size：166K
  • [VHDL] fir_liujiao.rar Using verilog Language Design and Implementation of 8-channel FIR filter
    Category: VHDL-FPGA-Verilog Upload User：hhhhly Size：94K
  • [VHDL] PCIBusDesign.rar Verilog-based PCI-bus interface design and application.
    Category: VHDL-FPGA-Verilog Upload User：cqngc868 Size：17035K
  • [VHDL] VerilogHDL.rar Verilog HDL__.rar a brief tutorial, very useful
    Category: VHDL-FPGA-Verilog Upload User：cengfr Size：602K
  • [VHDL] chA.zip phase frequency detector verilog
    Category: VHDL-FPGA-Verilog Upload User：liu9928280 Size：13K