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  • [Asm] 8M.rar Flying Scalfaro PLL 8-bit MCU, so that an external crystal for single-chip set 32.768KHz, through the programming so that the bus frequency of 8M
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  • [PDF] ProgrammableClockGenerators_Chinese.rar Programmable clock generator and PLL CYPRESS company introduction of hardware design has reference value!
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  • [Windows_Unix] 200710073.zip Phase-locked loop composed of the basic working principle of phase-locked loop PLL Application
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  • [Visual C++ (VC++)] lock.rar PLL procedures can be used. Mainly c-style language in matlab can also be used under
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  • [Asm] LMX2326.rar Single-chip PLL-based control procedures designed to control AT89S52 programming LMX2326
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  • [Matlab] PLL.rar A phase-locked loop to write their own procedures, we hope to be helpful
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  • [Visual C++ (VC++)] PLL.rar tms320vc5509a dsp chips procedures, for example, to share
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  • [Matlab] pll.rar The program realization of phase-locked loop, operating environment for matlab, the second-order loop filter
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  • [Others] DDS.rar In FPGA-based lookup table approach (LUT) to achieve the DDS can be used in the digital down-conversion and COSTAS PLL, Verilog prepared, I have transferred Qualcomm
    Category: VHDL-FPGA-Verilog Upload User:jinmajixie Size:145K
  • [Others] dpll_demo.rar A simple digital PLL Verilog code, I draw on-line after the existing code, as amended, pass upward in the Cyclone II realized, there are successful ModelSim Simulation Waveform
    Category: VHDL-FPGA-Verilog Upload User:szzpzh Size:66K