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C/C++]
ADF4001.rar
ADF4001 PLL-based procedures, AVR GCC version. Used ATMEGA16L singlechip
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Matlab]
ACarrierTrackingAlgorithmBasedOnFPLL.rar
... control oscillator (NCO) module can achieve the very high frequency tracking accuracy. Because of the frequency lock loop traction PLL filter can be designed very narrow, with very good noise suppression performance, to meet the precise requirements of ...
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C/C++]
MC145152.rar
1, the single-chip digital phase-locked loop code. 2, microcontroller and digital PLL MC145152 Application System Design and Implementation.
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shone2 Size：
12K
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PDF]
pll.rar
Collection of digital phase-locked loop design articles related articles. Mainly VHDL design languages.
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C/C++]
demoIOC.rar
Code Warrior 4.6Target: MC9S12DG128BCrystal: 16.000Mhzbusclock: 8.000MHzpllclock: 16.000MHz This procedure mainly includes the following features: 1. Setting PLL and the bus frequency 2.IO I use 3.IOC7 I 16 counter. LED count, in accordance with lights ...
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szruihong Size：
231K
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C/C++]
demoATD.rar
... Code Warrior 4.6Target: MC9S12DG128BCrystal: 16.000Mhzbusclock: 8.000MHzpllclock: 16.000MHz This procedure mainly includes the following features: 1. Setting PLL and the bus frequency 2.IO I use 3. A total of four ATD use and display method. LED count, ...
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yh22282098 Size：
239K
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C/C++]
demoSCI.rar
... Warrior 4.6Target: MC9S12DG128BCrystal: 16.000Mhzbusclock: 8.000MHzpllclock: 16.000MHz This procedure mainly includes the following features: 1. Setting PLL and the bus frequency 2.IO I use 3.SCI I use: to provide receive/transmit character , string, ...
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geliang_88 Size：
234K
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PDF]
frequencySynthesis.rar
Frequency synthesizer loop filter design, introduced by the integrated phase-locked-chip phase-locked PE3236 and an integrated single-chip component Central ADF4107 PLL loop filter commonly used.
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Matlab]
PhaseNoise.rar
Fractional-N technology to solve the PLL frequency synthesizer in the frequency resolution and conversion time of contradictions, but the introduction of a serious phase noise, the traditional method of phase compensation A? D because of the number of ...
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VHDL]
111.rar
Digital phase detector, digital PLL frequency synthesizer system FPGA realization of referential value
切换至中文 Over 1 million code package, 10 million code file free download 
