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[
MultiPlatform]
beipin.rar
using Verilog cpld written by the various sub-frequency procedures in the hope that we stand corrected, thank you!
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PDF]
xilinx_design_flow.zip
... capabilities are worthless if you can’t use
them in YOUR course
• Design software should support all ranges of designs
from CPLD to the high-density FPGA
• Works with YOUR design flow
– minimize impacts to the design cycle
– work with ...
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[
Others]
Serial.rar
CE be extended serial port, using CPLD mode, extended four serial ports, 48 IO port
Category:
Windows CE Upload User：
tjwang2001 Size：
34K
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C/C++]
MPC850_debug.zip
Introduced aided design using CPLD in the embedded system, march MPU complex logic functional design of the overall program given by XC95144 the re-configured using control registers in order to achieve the MPU reset switch logic and CPM protocol ...
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[
VHDL]
addr.rar
M4A564/32 CPLD VHDLA procedures, debugging is available, 51 to expand.
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[
VHDL]
CPLDjiaocheng.rar
Mainly on the introduction MAGIC3000 series CPLD development board of the 10 examples, such as neon demonstration, with the PC serial port communications.
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[
VHDL]
xc2s200pin_out_test.rar
Xillinx chip for xc2s200-pq208 PCI pin test, and sometimes worry that welding is good, need to test PCI pin can also be modified to test other XILLINX chips, want to learn for the CPLD, FPGA
Category:
CSharp Upload User：
mb1860t Size：
277K
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[
VHDL]
psp.rar
psp screen display driver cpld veriloghdl
切换至中文 Over 1 million code package, 10 million code file free download 
