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  • [Visual C++ (VC++)] usb.rar Test procedures for the use of 68,013, including 68,013 firmware (using the synchronous slave FIFO bulk read and write, EP2 OUT, EP6 IN), driver, PC-side test procedures. VHDL code of CPLD
    Category: USB develop Upload User:hbtchina Size:989K
  • [Others] Xinlinx_ISE_study.rar Introduction to Chinese Xilinx Inc. FPGA/CPLD integrated development environment-ISE software simple to use
    Category: Embeded-SCM Develop Upload User:shyahuei Size:806K
  • [VHDL] example10.rar : Sine wave generator routine, including a direct digital synthesizer (DDS), as well as the application of the principle of frequency control CPLD generated sinusoidal signal frequency.
    Category: Other systems Upload User:bjdyfy Size:56K
  • [VHDL] Altera_060012001.zip sch.lib about altera s cpld.
    Category: VHDL-FPGA-Verilog Upload User:yzyinjia Size:158K
  • [VHDL] MAXplusII102crack.rar MAXplusII102crack--cpld fpga
    Category: Communication Document Upload User:baihesheng Size:3K
  • [VHDL] UsbBlaster.rar CPLD download line production, including circuit diagrams, etc., in the hope that we have to help
    Category: VHDL-FPGA-Verilog Upload User:lct2010 Size:178K
  • [VHDL] CPLDvhdl.rar (1) distance algorithm and design (2) using FPGA/CPLD implementation.
    Category: VHDL-FPGA-Verilog Upload User:sunny_1006 Size:13649K
  • [Others] DDS_VHDL.rar Written by a foreigner with CPLD realize DDS software, your information!
    Category: Embeded-SCM Develop Upload User:jamesfzj Size:4K
  • [Others] yejing.rar Xilinx CPLD source code, use the XC9500 series CPLD, LCD Driver
    Category: VHDL-FPGA-Verilog Upload User:jake1999 Size:70K
  • [PDF] 1.rar VHDL in CPLD and FPGA Design, journal papers, about the complexity of the language of logic device usage
    Category: Other eBooks Upload User:gmgdxu Size:140K