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Visual C++ (VC++)]
usb.rar
Test procedures for the use of 68,013, including 68,013 firmware (using the synchronous slave FIFO bulk read and write, EP2 OUT, EP6 IN), driver, PC-side test procedures. VHDL code of CPLD
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Others]
Xinlinx_ISE_study.rar
Introduction to Chinese Xilinx Inc. FPGA/CPLD integrated development environment-ISE software simple to use
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VHDL]
example10.rar
: Sine wave generator routine, including a direct digital synthesizer (DDS), as well as the application of the principle of frequency control CPLD generated sinusoidal signal frequency.
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VHDL]
UsbBlaster.rar
CPLD download line production, including circuit diagrams, etc., in the hope that we have to help
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VHDL]
CPLDvhdl.rar
(1) distance algorithm and design (2) using FPGA/CPLD implementation.
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Others]
DDS_VHDL.rar
Written by a foreigner with CPLD realize DDS software, your information!
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Others]
yejing.rar
Xilinx CPLD source code, use the XC9500 series CPLD, LCD Driver
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PDF]
1.rar
VHDL in CPLD and FPGA Design, journal papers, about the complexity of the language of logic device usage