verilog code resource search result, page 55, Verysource

[WORD] cou.rar verilog hdl
Category: VHDL-FPGA-Verilog Upload User：yu8115 Size：3K
[WORD] lat.rar verilog hdl
Category: VHDL-FPGA-Verilog Upload User：maxzhb99 Size：3K
[VHDL] mipsdesign.rar mips core code, Verilog written
Category: VHDL-FPGA-Verilog Upload User：jeckzhong Size：5K
[TEXT] szdyb.rar Verilog HDL-based procedures for the digital voltmeter
Category: VHDL-FPGA-Verilog Upload User：amy9088 Size：1K
[VHDL] VerilogStudyNote.rar Verilog learning experience, very good documentation for getting started
Category: VHDL-FPGA-Verilog Upload User：cdouyang Size：14K
[VHDL] beep.rar CPLD driver speakers with music player, the program is written in VERILOG,
Category: VHDL-FPGA-Verilog Upload User：yaole321 Size：256K
[VHDL] shumaguan.rar CPLD drives with digital control, of from 0000 to 9999, digital control is a dynamic display, the program completed with VERILOG
Category: VHDL-FPGA-Verilog Upload User：tedaboda Size：1426K
[Others] videofram.rar with CPLD control image frame buffer cards logical verilog procedures, Quartus II 5.0 Open
Category: VHDL-FPGA-Verilog Upload User：bjbfmk Size：1K
[Others] rs-codec(255-223).Rar This is rs (255,223) verilog source coding. Inside : encode, decode, test-bench and other documents.
Category: VHDL-FPGA-Verilog Upload User：yu88999 Size：18K
[VBScript] news5f.rar Verilog HDL prepared by the five-frequency circuits. Clock using two phase logic role.
Category: VHDL-FPGA-Verilog Upload User：sdfqgg Size：44K

keyword: verilog