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  • [Matlab] Matlabtoolbox-logic.rar Matlab toolbox fuzzy logic function, we hope to help.
    Category: Other eBooks Upload User:gzyjr2008 Size:49K
  • [Windows_Unix] synplicity8.0.rar Electronic design automation (EDA) compa ny providing logic synthesis and analysis tool 's for FPGA and ASIC designers.
    Category: VHDL-FPGA-Verilog Upload User:dxkjfz Size:247K
  • [Windows_Unix] CirrusLogic.zip IAR Development Environment Cirrus Logic Programming
    Category: SCM Upload User:e07559 Size:53K
  • [MultiPlatform] ARM7vC.rar ... , elegant and fully static design is particularl y suitable for cost and power-sensitive applic ations. The ARM7's small die size makes it ideal for integrating into a larger custom chip that c ould also contain RAM, ROM, logic, DSP and other cells.
    Category: ARM-PowerPC-ColdFire-MIPS Upload User:aftljh Size:179K
  • [Others] MODE_Switch2.rar ... event occurrin g. But the IRQ flag set does not mean the system to e xecute the interrupt vector. The IRQ flags can b e triggered by the events without interrupt ana ble. Just the only any event occurs and the IRQ wi 'll be logic "1."
    Category: SCM Upload User:sw2041 Size:3K
  • [PDF] hardware_design_manual.rar Hardware Design Guide (PDF format), including : Low Voltage Interfaces; Grounding in Mixed Signal Systems; Digital Isolation Techniques; Power Supply Noise Reduction and Filtering; Dealing with High Speed Logic
    Category: Other systems Upload User:rongdasara Size:441K
  • [Visual C++ (VC++)] qmc.rar to Kunma Klaus logic solutions lex, yacc achieve equ
    Category: Compiler program Upload User:xmkykg Size:28K
  • [Java/JSP] lemonsms-src-win-beta-1-0-0.zip ... Lemon SMS only provides an interface to the added SMS f unctionality. your application still handles access to a data nd business logic tier. With the easy-to-use Le monSMS API, developers can easily utilize SMS functionali ties provided by LemonSMS.
    Category: Windows Develop Upload User:szcyled Size:135K
  • [PDF] VerilogandVHDL.rar ... Designing a synchronous finite state Another w ay of organizing a state machine (FSM) is a commo n task for a digital logic only one logic block as shown in engineer. This paper will discuss a var iety of issues regarding FSM design using Synop sys Design ...
    Category: VHDL-FPGA-Verilog Upload User:cosmo_dong Size:111K
  • [C/C++] simpleMathFunctions.rar some simple but time wasting some math logic difficult but trouble (suitable for use as computer) mathematical function source 1.Test for Prime number 's 2.Find the factorial of a number 3.Find the tri angle (total sum) of a number in every 4.Reverse ...
    Category: Windows Develop Upload User:szkaiyuekj Size:2K