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  • [PPT] plc-ppt-3.zip programmable logic controllers
    Category: Embeded-SCM Develop Upload User:dahuaroom Size:72K
  • [PPT] plc-ppt-2.zip programmable logic controllers2
    Category: Embeded-SCM Develop Upload User:dlfangzhen Size:229K
  • [PPT] plc-ppt-3.zip programmable logic controllers
    Category: Embeded-SCM Develop Upload User:xianbetter Size:34K
  • [PPT] RungExamples.zip programmable logic controllers
    Category: SCM Upload User:qztongli Size:154K
  • [VHDL] Vhdl-Primer-by-Bhaskar.rar This book, written by J. Bhaskar explains all the basic concepts of VHDL(Very High Speed Integrated Circuit Hardware Discription Language). VHDL is used to design digital logic gates on a chip. 163 Pages
    Category: Other eBooks Upload User:pyufpsx Size:1093K
  • [PPT] High_Speed_FPGA.zip This is a PPT presentation named HSRA:High-Speed, Hierarchical Synchronous Reconfigurable Array (FPGA) prepared at the University of California at Berkeley. It gives a broad overview for beginners in the digital design with configurable logic.
    Category: SCM Upload User:xiguancai Size:389K
  • [C/C++] ep93xx_wince600_bsp_1-0-3.rar BSP for EDB93XX platform (ARM9) from Cirrus Logic. Windows Embedded CE 6.0
    Category: Other Embeded program Upload User:huang8230 Size:1423K
  • [C/C++] ep93xx_bsp_for_wince_5.0.rar The BSP by Cirrus Logic for wince5.0. Development board EDB93XX
    Category: Windows CE Upload User:syxjtcdj Size:1896K
  • [VHDL] wtut_ver.zip ... at the CLKIN input must be in the Low (DLL_CLKIN_MIN_LF to DLL_CLKIN_MAX_LF) frequency range (MHz). See The Programmable Logic Data Book for the current DLL_CLKIN_MIN_LF to DLL_CLKIN_MAX_LF frequency range values. In Low frequency mode, the CLK0, ...
    Category: VHDL-FPGA-Verilog Upload User:tongtsad Size:25K
  • [VHDL] wtut_vhd.zip ... at the CLKIN input must be in the High (DLL_CLKIN_MIN_HF to DLL_CLKIN_MAX_HF) frequency range (MHz). See The Programmable Logic Data Book for the current DLL_CLKIN_MIN_HF to DLL_CLKIN_MAX_HF frequency range values. In High frequency mode, only the ...
    Category: VHDL-FPGA-Verilog Upload User:sanyouds Size:35K