-
-
[
VHDL]
TIMEFACEDETECTIONANDLIPFEATUREEXTRACTIONUSINGFPGA
... around the lip contour to extract the height and width
of the mouth, metrics that are useful for speech filtering. The
proposed FPGA system occupies only 15 050 logic cells, or about
six times less than a current comparable FPGA face detection
system.
-
-
-
-
[
Visual C++ (VC++)]
11111111.rar
is a program that generates a sequence a little silly and logic 1 11 21 1211 1112 21 312211
Category:
SCM Upload User：
liurr1222 Size：
482K
-
[
VHDL]
CIC_Moore.rar
It is a complete project of Cache Interface Controller programmed in VHDL using the logic of Moore State Machine
-
[
VHDL]
pci_23.zip
this is 1553B encoder logic writen in verilog. is compatible with 1553 DDC
-
-
[
C/C++]
RAIL.rar
program in c demonstrating the railfence cipher which is widely used in networks. the code is best suited for beginners, because of the implementation of logic in an easier way.
-
[
Asm]
8051fuzzycontroller.zip
This is source code for fuzzy logic controller. using micro 8951. combined with delphi
in PC enjoy! any information:contact enas.dhuhri@gmail.com
切换至中文 Over 1 million code package, 10 million code file free download 
