cpld code resource search result, page 51, Verysource

[VHDL] CPLD80386.zip CPLD using a 80,383 emulation of CPU, is worth a reference, a rare
Category: VHDL-FPGA-Verilog Upload User：deer201011 Size：231K
[VHDL] 8051-Verilog.zip CPLD simulation using 8051 nuclear, which has source code and description, the hard-won
Category: VHDL-FPGA-Verilog Upload User：lmxny16666 Size：88K
[VHDL] CPLD8088verilog.zip CPLD simulation using 8088 nuclear, which has source code and description can refer to
Category: VHDL-FPGA-Verilog Upload User：qianlima1 Size：270K
[Others] DSP123.rar TMS320VC5402 comprehensive experimental board schematics, including STC89LE58RD+ Chips, as well as the CPLD, the embedded hardware systems development, has a great reference value
Category: DSP program Upload User：shuiliao Size：280K
[VHDL] DTXS.zip Verilog HDL, prepared by four digital tube dynamic display procedures, the external circuit with CPLD to realize
Category: VHDL-FPGA-Verilog Upload User：shine0117 Size：1K
[VHDL] cpld_quartus50_over.rar VERILOG HDL languages through the use of CPLD to connect PS2 keyboard.
Category: Embeded-SCM Develop Upload User：monqiqifly Size：1992K
[Visual C++ (VC++)] keilcads850.rar CPLD language produced by 16 ad converter ads850 drive
Category: SCM Upload User：penggsandy Size：1K
[VHDL] USBblaster.rar Altera Corporation debugging CPLD/FPGA used USBblaster production of documents, in great detail, and have done so before, absolutely no problem
Category: VHDL-FPGA-Verilog Upload User：yygwork Size：2218K
[VHDL] eda.rar Using VHDL prepared a taxi meter, starting 6 dollars two kilometers, and thereafter every half a kilometer of 0.8 yuan, parking to wait for every 2.5 hours of 0.8 yuan. Through simulation, but not downloaded to the CPLD test
Category: VHDL-FPGA-Verilog Upload User：hdyvci Size：161K
[Objective-C] dipinshuzixiangweiceliangyi.rar Low-frequency digital phase-measuring instrument, using a phase-locked technique, CPLD technology
Category: Embeded-SCM Develop Upload User：hzkqfw Size：14K

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