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  • [Visual C++ (VC++)] PS2.rar CPLD using a mouse or keyboard-driven simulation of the procedures have been tested, but also can be used, but the effect is not a very good
    Category: Embeded-SCM Develop Upload User:nancy_8888 Size:468K
  • [VHDL] VHDL.rar This is the introduction of VHDL, with the industrial automation, CPLD and FPGA have been increasingly widely used in the field of industrial control
    Category: VHDL-FPGA-Verilog Upload User:xinghuagc Size:165K
  • [Others] ATmega128.rar ... experiment: the main chips: CPU: ATmega128L SRAM: SR61L256BS-8 CPLD: XILINX XC95144XL SFLASH: AT45DB081B ETHERNET: CS8900A USB: PDIUSBD12 LCD: ... POWER: LM2596S-3.3 RS232: MAX3232 software: RS232, SRAM, CPLD Debug through, uCosII can run, ethernet part not ...
    Category: Embeded-SCM Develop Upload User:poon668 Size:9704K
  • [Others] The_system_of_image_acquisition_base_on_cpld_and_c The system of image acquisition base on cpld and cis-based CPLD and Contact Image Sensor Image Acquisition System
    Category: Other systems Upload User:ouyang021 Size:209K
  • [PDF] FPGAexperice.rar FPGA/CPLD design of digital circuits to share their experience. Datang Corporation!
    Category: Embeded-SCM Develop Upload User:wlm1972820 Size:945K
  • [C/C++] EPM7128SLC84-10chengxushili.rar CPLD procedures, ALTERA Corporation EPM7128SLC84-10, PLCC84 package, has been testing the procedure, including the simulation files, wave ... and systems, as well as PCB schematics, very useful, especially the beginner EDA and the CPLD, FPGA devices were
    Category: VHDL-FPGA-Verilog Upload User:shguanyu Size:152K
  • [VHDL] infrared.rar CPLD Verilog language to control the use of infrared transceiver through infrared communication, which simple.qpf for the sending end of the project file, recive folder is recive.qpf receiving end engineering documents
    Category: Embeded-SCM Develop Upload User:dgdahonn Size:234K
  • [PDF] ch1.zip cpld/fpga outlined as well as the hardware description language design some of the concepts
    Category: VHDL-FPGA-Verilog Upload User:hvpower Size:191K
  • [VHDL] usb_jtag.rar FPGA, CPLD chip usb data download lines, download speed is the parallel port of the five, with a schematic diagram of procedures in
    Category: VHDL-FPGA-Verilog Upload User:wljf210 Size:230K
  • [C/C++] 6713_dsk_vhdl.rar TI 6713DSK board CPLD procedures PDF format
    Category: Compiler program Upload User:xieyy520 Size:31K