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  • [Others] dsp48macro_macfir.zip xilinx embedded system: FIR design example.
    Category: VHDL-FPGA-Verilog Upload User:wyuanchu Size:30K
  • [MultiPlatform] ADfir.rar The following is I have written in the AD interface developed under the procedures for FIR filters.
    Category: VHDL-FPGA-Verilog Upload User:qiudebio Size:4K
  • [Others] TIFIR.rar The following is a preparation of my own company has developed the TI interface FIR filter under the CCS program.
    Category: DSP program Upload User:ericgaogd Size:27K
  • [Matlab] firbynna.rar I prepared for this procedure the neural network type 1 FIR filter design procedures, the reader after reading this program, it is a profound understanding of how to use BP network and the LMS algorithm to design filters. Just change the procedures in H ...
    Category: AI-NN-PR Upload User:chinaszjds Size:1K
  • [Others] fpga.rar FPGA functionality in response to the realization of finite word-length FIR prepared using Verilog
    Category: VHDL-FPGA-Verilog Upload User:zbhrhj Size:136K
  • [PDF] FIR_FPGA.zip FIR filter FPGA introduced to achieve efficient and ingenious authentication, good
    Category: VHDL-FPGA-Verilog Upload User:shkjnet Size:277K
  • [Others] FIRLAB.rar Used to compile the realization of FIR filter, the sampling frequency 8000Hz, as at a frequency of 2000Hz, operating environment for CCS
    Category: assembly language Upload User:jzd86china Size:5K
  • [C/C++] FirGen_V1.1.rar Have you need FIR filter, can generate VHDL source code format.
    Category: VHDL-FPGA-Verilog Upload User:laibao5588 Size:360K
  • [Visual C++ (VC++)] q.rar FIR filter design experiment [with procedures source] can be useful, there is reference value
    Category: Mathimatics-Numerical algorithms Upload User:gzluxled Size:137K
  • [Visual C++ (VC++)] adaptive.zip adaptive filtering IIR and FIR
    Category: DSP program Upload User:chenfus Size:2K