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  • [Matlab] 3filters.rar Low-pass sampling design using MATLAB low-pass, band-pass, high pass and band-stop FIR digital filter
    Category: Communication-Mobile Upload User:hongpeng9 Size:7K
  • [Matlab] MFXLMS1.rar Realize adaptive algorithm, the use of FIR filters to achieve, in Active Noise Control has predictive power
    Category: source in ebook Upload User:hxp_01 Size:1K
  • [Matlab] MFXLMS3.rar Realize adaptive algorithm, using FIR filters realized in three-dimensional space of the Active Noise Control has predictive power
    Category: matlab Upload User:hktqjx Size:2K
  • [Visual C++ (VC++)] FilterDesign.tar.gz Procedures for FIR filter design covers a variety of methods, including least squares, Chebyshev interpolation and practical application of a much wider variety of rules!
    Category: Algorithm Upload User:nsdled Size:208K
  • [VHDL] Pall_FIR.rar FIR low-pass filter was designed in parallel algorithm design
    Category: VHDL-FPGA-Verilog Upload User:sd3200 Size:1958K
  • [Matlab] fir174_test.rar fir filter 174 taps fix point
    Category: matlab Upload User:gygfyy Size:11K
  • [Visual C++ (VC++)] digitalprocessing.rar Digital signal processing experimental procedures. Welfare rapid transform, convolution, fir, iit digital filter
    Category: DSP program Upload User:binky88 Size:105K
  • [PDF] spt.rar Optimal design of FIR based on CSD code to quantify a lower filter to improve the method of computing the amount of
    Category: Communication Document Upload User:dtdoor Size:773K
  • [VHDL] ImproveddesignofCICfilteranditsimplementationonFPG ... filter structure and properties of their respective, from the mathematical analysis of its performance and its relationship with the FIR filter, from the frequency domain to display its essence. And to discuss its internal register with the smallest bit ...
    Category: VHDL-FPGA-Verilog Upload User:hfgtjx Size:122K
  • [VHDL] DecimationFilterDesignforDDCandImplementingItwithF ... (DDC) of the decimation filter system design methods and concrete realization of the program. Using CIC filter, HB filter, FIR filter cascade three-level approach to reduce the sampling rate. Through the actual authentication, to prove the feasibility of ...
    Category: VHDL-FPGA-Verilog Upload User:dawnssy Size:458K