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VHDL]
RELEASE.rar
In the CPLD to achieve PCI interface, has been commissioning, confirmation can be used
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VHDL]
i2c.rar
Pressing a button keyboard CPLD development board DIP switches, the data will be written to EEPROM in an address, pressing another key, the newly written data- read back CPLD, and significant in the digital pipe
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VHDL]
fjq1.rar
Describes the digital voice communications, the use of in-system programmable technical and complex programmable logic device CPLD, to achieve the digital voice multiplexer and demultiplexer for the single steady state in which the digital circuit and ...
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VHDL]
fjq2.rar
CPLD supports in-system programmable (ISP) technology, ISP Communications technology is the latest ASIC design of a design methodology, which makes digital circuit design, production and maintenance of a revolutionary change [1]. In this paper, digital ...
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VHDL]
EDAVHDL.rar
VHDL hardware description language introduced the MAX+ PLUS Ⅱ Introduction CPLD digital development of experimental systems, as well as 10 digital circuits and digital systems, the source code and introducing experimental
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VHDL]
lcd1602_test.zip
CPLD on the LCD 1602 of the test program can effectively test the hardware connection is correct!
Category:
SCM Upload User：
huaxiang Size：
125K
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Visual C++ (VC++)]
EX05_BUZZER.rar
Experiment description: The DSP inside the CPLD to send data, and then by the CPLD' s IO port to control the specific hardware circuit can be**** View and CPLD code**** results: load the buzzer could be heard running the program tick cry .. tick ..
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VHDL]
plj.rar
On cpld frequency counter program, measurement frequency range of 1Hz to 99999Hz
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Matlab]
82CPLD_raoma.rar
CPLD-based code scrambling code and de-scrambling device design, scrambling to achieve with the M series, m series progression and frequency of optional
切换至中文 Over 1 million code package, 10 million code file free download 
