切换至中文 Over 1 million code package, 10 million code file free download
  • [C/C++] 16c54-time-display-with-LED.rar 16c54 based on the four LED clock display program
    Category: SCM Upload User:xindawater Size:2K
  • [C/C++] clock.rar Analog clock, to have time to debug the system, no time to worry out of date, interface aesthetics
    Category: CSharp Upload User:luntai Size:2K
  • [C/C++] ssss.rar Using 8-bit dynamic scanning LED clock demonstration, the use of 12MHZ crystal, P0 port output above code, P2 scan I made out with a total of LED digital tube Yang.
    Category: SCM Upload User:haywoodhu Size:1K
  • [Visual C++ (VC++)] praticalMCUprogram.rar Practical single-chip source, such as upper and lower communication, clock, etc.
    Category: SCM Upload User:shtaya11 Size:153K
  • [Others] clk_div.rar VHDL description of the clock divider circuit, uses widely ...
    Category: VHDL-FPGA-Verilog Upload User:lwz3007 Size:1K
  • [Visual C++ (VC++)] lcd.rar .
    Category: SCM Upload User:wxj1219 Size:31K
  • [C/C++] C51procedures.Rar real-time clock chip DS1302 the procedures C51
    Category: SCM Upload User:cdjywx Size:1K
  • [C/C++] 12864+18b20+ds12887.rar Main functions: the use of AT89C/S51 as a controller, JM12864M models of lcd as a man-machine interface, 18B20 temperature sensors and DS12887 Clock IC chip for auxiliary adjustable calendar system. This calendar can show the image of the system
    Category: SCM Upload User:haifulin Size:813K
  • [C/C++] RD_DevuceID_Fr_McBSP0_to_SDRAM_ok.rar dsp 5509a memory test, SDRAM test procedure, 12Mx16 = 192/2 = 96Msdram clock
    Category: DSP program Upload User:sdruixin Size:365K
  • [VHDL] fft_statemachine.rar FFT procedure, this procedure should not consume a lot of logic resources, but the data in the first seven clock can be output along the FFT transformed data, the requirements of time-delay system can be considered lower
    Category: VHDL-FPGA-Verilog Upload User:jzjyhj Size:7K