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[
VHDL]
TX.rar
The launch of a video PDH client, VHDL source code, use the whole FPGA chip hardware, built-in framing, clock, SERDES
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VHDL]
RX.rar
PDH a video of the receiving end, VHDL source code, use the whole FPGA chip hardware, built-in framing, clock, SERDES
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[
VHDL]
F7-2VT-1DR.rar
2-way video PDH' s, VHDL source code, use the whole FPGA chip hardware, built-in framing, clock, SERDES
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Unix_Linux]
interrupt.rar
Timer interrupt experiments, respectively, set the alarm clock time value and time value, through the serial port can display the current real-time clock time value, when the arrival alarm set time, it will trigger the alarm clock interrupts
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C/C++]
Lab0201-Memory.rar
DSP/BIos clock timer C++ source code, so that should have added in the BIOS to set the settings related to the content
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Visual C++ (VC++)]
uart.rar
This is an example of serial communication interface is a single chip at 12MHz clock frequency in the communication baud rate of 9600bps software UART implementation of the send process.
Category:
SCM Upload User：
lionlds Size：
1K
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Others]
jingmeishizhong.rar
A c# Realize the exquisite clock, attached to the skin settings, clock settings, timing shutdown, and other functions, not only full-featured, and the beautiful interface, especially for girls
Category:
CSharp Upload User：
w4257666 Size：
70K
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C/C++]
1302_V2.rar
The use of Sunplus 61-chip MCU and 1302 hours to complete and use the clock function CH451LS chip display (program only in its LED display 0 seconds). Is used, main.c is the 1302 driver chip time, CH451LS0811.h is simple chip CH451LS drive.
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