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[
Asm]
tls6.rar
For hand-held by the clock, the clock chip of job stability to temperature sensor D18B20 collection, fine-tuning of the built-in clock chip capacitors to change the vibration frequency
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SCM Upload User：
sarahliyan Size：
6K
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C/C++]
Cpp11.rar
that a company has a customer reception center, the unit time to a random customers to ask reception centers set up for each customer reception time is within the scope of a random value, is only a reception center set up to receive, process simulation ...
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MultiPlatform]
DPLL.Rar
digital phase-locked loop PLL design source, in which Fi is the input frequency (receive data), Fo (Q5) is the local output frequency. Objective is to extract data input clock signal (Q5), its frequency and data rate line, the clock rising edge of the ...
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Visual C++ (VC++)]
B04.zip
in the application process, often a number of tasks in the background, achieve two ways : OnIdle cycle timer and handling. The cases used to create a clock timer
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Visual C++ (VC++)]
96.rar
without passwords, direct decompression, C is a series of the simulated clock, suitable for students.
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taixima1 Size：
42K
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C/C++]
theracebetweenthesmallgame.Rar
face this code to simulate the hand of the mountain, which has a clock installed trigger the implementation of a second cycle of the turtle is a rule : 50% chance of brisk walking (3 Georgia shift to right) 20% chance of decline (6 bits grid) 30% chance ...
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VHDL]
CLOCK.rar
FPGA-based multi-functional electronic clock designs are very classic Oh
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Asm]
DOU.rar
tenor notes, books and instruction cycle frequency prepared, clocked 12m. Comparison easy.
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gzlcgaoke Size：
2K
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