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  • [C/C++] clock.rar With ds18b20+ Ds1302+ 89s52 make clock
    Category: SCM Upload User:qiye66669 Size:69K
  • [VHDL] eternityclock.rar Clock procedures, 24 hours. Verilog prepared by simulation.
    Category: Fax program Upload User:wyhgxwyk Size:1630K
  • [C/C++] clockrs232.rar Can be modified serial clock procedures, using serial debugging tool for debugging aides. See procedures on the U.S. circuit know, with the single-chip S8952.
    Category: Embeded-SCM Develop Upload User:ahao520 Size:81K
  • [C++ Builder] shizhong.rar 51 Series single-chip based on an internal timer to write a clock procedures
    Category: SCM Upload User:yuzhaozhen Size:55K
  • [C/C++] FYDwendushizhong.rar Based on 51 Series Single-chip temperature sensor to DS18B20 for digital thermometer, joined the clock module, with 12864LCD show
    Category: SCM Upload User:luchao1959 Size:37K
  • [C/C++] doc_ucosii_data_m8_iccavr_by_yfang2.zip -UCOS-II compiler ICCAVR. It simplifies original UCOS by removing hook, but it keeps basic functionality.
    Category: Embeded-SCM Develop Upload User:luiben Size:446K
  • [Visual C++ (VC++)] CLabel_src.zip This procedure CStatic derived from CLabel, similar to Visual Basic used to realize the Label function, support text content change clock font attributes, text color, background and border style of presentation characteristics of the population.
    Category: Static control Upload User:sunest Size:8K
  • [C/C++] 9981DS1302.rar A digital display clock procedures, using a DS1302 clock chip, using 51 single-chip direct interface to read instructions, and have protues approach with 1602 show!
    Category: Embeded-SCM Develop Upload User:yamhqtbl Size:88K
  • [VHDL] clock.rar dp_xiliux the CPLD Verilog design experiments, clock demo. code test.
    Category: VHDL-FPGA-Verilog Upload User:tfsbgs Size:79K
  • [Visual C++ (VC++)] clock.rar prepared under the windows clock, using GDI,
    Category: GDI-Bitmap Upload User:lgbdw72 Size:26K