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keyword: vhdl

  • [VHDL] f50k.rar VHDL generated clock frequency of 50 procedures, the reference for beginners
    Category: VHDL-FPGA-Verilog Upload User：iamchi1983 Size：794K
  • [VHDL] music_1.rar This is a Quartus II software in the preparation of the VHDL program. After the buzzer can be used to download music player
    Category: VHDL-FPGA-Verilog Upload User：xyffight Size：592K
  • [VHDL] shuizhongvhdl.rar When a digital clock in VHDL procedures, time, school hours, the whole point timekeeping function, it is suitable for use in EDA Design
    Category: VHDL-FPGA-Verilog Upload User：qiye66690 Size：0K
  • [VHDL] FIFO.zip here is realized simple FIFO stack in vhdl. very simple example, but very helpful.
    Category: VHDL-FPGA-Verilog Upload User：hbhuatai Size：13K
  • [VHDL] jiaotongdengsheji.rar This is a traffic light control, VHDL program for maxplus platform, suitable for EDA Design
    Category: VHDL-FPGA-Verilog Upload User：zhoumin Size：0K
  • [VHDL] test.rar VHDL code
    Category: VHDL-FPGA-Verilog Upload User：licong Size：66K
  • [VHDL] IEEEStandardVHDL.zip IEEE Standard VHDL language
    Category: VHDL-FPGA-Verilog Upload User：alice112 Size：996K
  • [VHDL] alarmclock.rar Numbers in (VHDL)! ! ! ! ! ! ! ! ! ! ! ! ! ! ! !
    Category: VHDL-FPGA-Verilog Upload User：xyc6666 Size：382K
  • [VHDL] JTKZQ1.rar Traffic Light Control (VHDL)! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! !
    Category: VHDL-FPGA-Verilog Upload User：xiucaichen Size：684K
  • [VHDL] myclock.rar VHDL language used to achieve a display hours, minutes and seconds of the clock: when can be manually corrected and points 12 hours, optional 24-hour time system, 12-hour on the afternoon of instructions from time to time when the time to the scheduled ...
    Category: VHDL-FPGA-Verilog Upload User：yeeken Size：374K