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keyword: vhdl

  • [VHDL] Xilinx_TMR_XVRWARE_Library.rar XVRWARE Library Xilinx Inc. The XVRWARE Synthesis library provides macros and synthesis examples for constructing TMR circuits in VHDL for the Virtex architecture
    Category: VHDL-FPGA-Verilog Upload User：smt180 Size：20K
  • [VHDL] VHDL_CCD.rar VHDL language with the image sensor TCD132D realize the timing-driven code, timing accurate!
    Category: VHDL-FPGA-Verilog Upload User：chb_0306 Size：68K
  • [VHDL] mp3.zip VHDL code for MP3 decoder
    Category: VHDL-FPGA-Verilog Upload User：thnm888 Size：28K
  • [VHDL] dac0832.rar CPLD about procedures, the use of VHDL language implementation of the DAC0832 Timing Control
    Category: VHDL-FPGA-Verilog Upload User：guoying Size：196K
  • [VHDL] ADC0809VHDL.rar File name: ADC0809.vhd features: Based on the VHDL language, easy to control implementation of the ADC0809 Description: ADC0809 internal clock does not need external 10KHz ~ 1290Hz clock number, here by the FPGA system clock (50MHz) frequency by 256 ...
    Category: VHDL-FPGA-Verilog Upload User：qinchun868 Size：1K
  • [PDF] Morgan.Kaufmann.VHDL VHDL-2008 Just the New Stuff Peter J. Ashenden Consultant Ashenden Designs
    Category: VHDL-FPGA-Verilog Upload User：sowin98 Size：780K
  • [VHDL] dianzibiao.rar To achieve a simple spreadsheet functions, is 24 hours, using VHDL prepared, quartus ii 7.2
    Category: VHDL-FPGA-Verilog Upload User：wts199 Size：122K
  • [VHDL] fft_gen.rar FFT vhdl generic: I m new to vhdl, and I tried to use xilinx fft core, but when I try to simulate it in test bench using ... I add the .xco & .vhd files to my project. 3- I create a new vhdl source as a wrapper to the core and add the code from the .vho files ...
    Category: VHDL-FPGA-Verilog Upload User：dolliya Size：6K
  • [VHDL] jcq.rar vhdl, sequence of signal detection module, this module testing 1.11001 million, can be changed to an arbitrary sequence, the output potential of an as detected, otherwise 0
    Category: VHDL-FPGA-Verilog Upload User：lexin_2002 Size：42K
  • [VHDL] display.rar vhdl, seven-segment digital tube driver, complete the digital display
    Category: VHDL-FPGA-Verilog Upload User：lywangzefu Size：84K