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C/C++]
D8_logic.rar
(Turn) This is a User-designed simple logic analyzer, a relatively simple and practical
Category:
SCM Upload User：
szhurrup Size：
98K
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Visual C++ (VC++)]
QQ2.0.rar
... communication procedures realize the key technologies Windows Socket, the last of the communication program design and analysis, given the logic and flow chart and some of the key procedures. Second, the program overall design process, mainly how to ...
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DOS]
jianyiluojifenxiyi.rar
Simple logic analyzer design production processes, complete reports, and feasibility analysis
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SCM Upload User：
kssb888 Size：
219K
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Others]
SystemOfTaxiFeeBasedOnVerilogHDL.rar
... the fare and the corresponding time, shows the hardware description language Verilog-HDL design of the superiority of digital logic circuits. Source by MAX+ PLUS Ⅱ software debugging, optimization, downloaded to EPF1OK10TC144-3 chip, can be applied to the ...
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WORD]
source_vhdl.zip
VHDL design example, the achievement of commonly used methods of logic design.
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MultiPlatform]
NTskyNews.rar
... have an administrator review and management of different users, with high stability and security. All data throughout the station logic operations have beans package complete with a simple interface, powerful, easy to operate and so on. Powered ...
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C#(.net)]
OA.rar
... developed and the forthcoming development of OA system to a Friend reference, to avoid you in the process of developing the unnecessary logic error or logical error, documentation is one of the most important part of the test code should not busy with a ...
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切换至中文 Over 1 million code package, 10 million code file free download 
