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keyword: fpga

  • [VHDL] trafficlight.rar fpga testing procedures of the traffic lights are able to achieve a full-featured
    Category: VHDL-FPGA-Verilog Upload User：st_laser Size：1K
  • [VHDL] cf_fir_latest.tar.gz It is a fir to implement in a FPGA. It s not desenvolved for me it is a good work of another person
    Category: VHDL-FPGA-Verilog Upload User：hzfhjnkj Size：185K
  • [VHDL] fpuvhdl_latest.tar.gz FPGA realization of floating-point operations, including the simulation file
    Category: VHDL-FPGA-Verilog Upload User：ha6627 Size：114K
  • [VHDL] mem_ctrl_latest.tar.gz FPGA memory control processes, including ram, fifo, sdram, flash and so on.
    Category: VHDL-FPGA-Verilog Upload User：qhddcblg2 Size：324K
  • [Others] Freq_counter.rar the code on the FPGA using VHDL development of the general process, finally adopted a FPGA-based digital frequency method. The design using VHDL hardware description language, the software development platform ISE completed, the higher speed clock ...
    Category: VHDL-FPGA-Verilog Upload User：karcher Size：503K
  • [Others] designofFPGA.rar FPGA design with four kinds of thinking skills, we will support ah
    Category: VHDL-FPGA-Verilog Upload User：linzl0824 Size：107K
  • [VHDL] uart_vhdl_lattice.zip FPGA-based source for the initial very helpful for those who catch
    Category: VHDL-FPGA-Verilog Upload User：libby321 Size：42K
  • [VHDL] TimingConstraint.rar xilinx provided on the FPGA hardware design timing constraints of the amount of reference material
    Category: VHDL-FPGA-Verilog Upload User：ply8118 Size：1308K
  • [VHDL] ADC0809VHDL.rar ... , easy to control implementation of the ADC0809 Description: ADC0809 internal clock does not need external 10KHz ~ 1290Hz clock number, here by the FPGA system clock (50MHz) frequency by 256 points to be clk1 (195KHz ) as the conversion ADC0809 clock job.
    Category: VHDL-FPGA-Verilog Upload User：qinchun868 Size：1K
  • [VHDL] 1-6.rar FPGA board was incidental to buy the tutorial, written in easy to understand, I hope useful for everyone
    Category: VHDL-FPGA-Verilog Upload User：bjdfmy_886 Size：4310K