切换至中文 Over 1 million code package, 10 million code file free download
  • [Others] CHICAGO5Manual.rar ... longer the field of semiconductor industry, field programmable logic arrays (FPGA) through the emergence of chip design software to quickly ... shortest possible period of time to master the application of FPGA and VHDL/AHDL/Verilog HDL logic design of the ...
    Category: VHDL-FPGA-Verilog Upload User:jina1977 Size:252K
  • [MultiPlatform] mo0re_FSM.rar -- Moore State Machine with explicit state encoding-- dowload from : www.fpga.com.cn
    Category: VHDL-FPGA-Verilog Upload User:tbn001 Size:1K
  • [MultiPlatform] FSM02.rar asynchronous reset state machine-- State Machine with Asynchronou 's Reset-- dowload from : www.fpga.com.cn
    Category: VHDL-FPGA-Verilog Upload User:szdzxd Size:1K
  • [MultiPlatform] BoothMultiplier.rar ... contains a ll the entity-architectures for a complete-- k- bit x k-bit Booth multiplier.-- the design mak es use of the new shift operators available in th e VHDL-93 std-- this design passes the Synplify synthesis check-- download from : www.fpga.com.cn
    Category: VHDL-FPGA-Verilog Upload User:lianshensl Size:2K
  • [MultiPlatform] wave_gen.rar waveform generator, with TESTBENCH. Multi-platform-- the design makes use of the new shift opera tors available in the VHDL-93 std-- this design passes the Synplify synthesis check-- downloa d from : www.fpga.com.cn
    Category: VHDL-FPGA-Verilog Upload User:sdlyzd Size:1K
  • [VHDL] XilinxDesign.rar Xilinx design flow, CIC Xilinx training and study materials. Information listed Xilinx design steps and to use the software to complete the FPGA design examples.
    Category: VHDL-FPGA-Verilog Upload User:wzx668899 Size:1328K
  • [VHDL] pinlvjiFPGA].rar FPGA design of a full set of frequency data, I hope all of you ah like useful
    Category: VHDL-FPGA-Verilog Upload User:cherie86 Size:590K
  • [VHDL] Habenera.rar Fun little FPGA that plays a portion of Habanera
    Category: VHDL-FPGA-Verilog Upload User:superdzkj Size:1505K
  • [MultiPlatform] xd_lcd_comp.rar A 240* 128 LCD module in the ALTERA FPGA NIOS application, write your own AVALON Bus IP, including all source code can be easily used in NIOS for reference
    Category: VHDL-FPGA-Verilog Upload User:select Size:13K
  • [VHDL] yuyin.rar In the FPGA to achieve the sound card interface, flower, filter comparators, the eventual realization of voice communications
    Category: VHDL-FPGA-Verilog Upload User:puzhongjx Size:55K