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  • [VHDL] crc_verilog.rar Cyclic code encoder Verilog realization, which contains the source code and simulation of Fig.
    Category: VHDL-FPGA-Verilog Upload User:db15db Size:15K
  • [MultiPlatform] H.264.rar This book, introducing digital video and video encoding based on the basic principles, discusses the characteristics of H264, encoder principle, the principle of the decoder and codec realization of the program.
    Category: Streaming_Mpeg4 Upload User:tjzxgg Size:10760K
  • [Matlab] GSM-TCH-FS.rar GSM TCH/FS channel coding simulation Simulation of communication systems, including internal and external encoder, interleaving rearrangement, and additive/sudden or mixed channel interference, de-interlacing anti-rearrangement, and internal and external ...
    Category: Communication Upload User:njdz0426 Size:44K
  • [Visual C++ (VC++)] divx_lencod.rar Video coding standard MPEG video encoder program code to realize the process of MPEG video coding
    Category: Special Effects Upload User:anan0612 Size:71K
  • [Visual C++ (VC++)] MPEG2TS_decoder.rar Mpeg-2 video encoder encoding the ts stream decoding procedures
    Category: mpeg mp3 Upload User:udbcel2004 Size:19831K
  • [VHDL] qep.rar A QEP circuit Verilog code. Input signal is the optical encoder of the A phase and B and believe that a deal with the clock, the output is the count signal and direction signal.
    Category: Other Embeded program Upload User:whxnyzmdq Size:1K
  • [Visual C++ (VC++)] Encoder.rar Lo siento mae, perdi todos mis archivos y necesito una libreria de aqui dentro
    Category: Other systems Upload User:zsr0501 Size:15K
  • [Visual C++ (VC++)] Encoder.rar Lo siento mae, perdi todos mis archivos y necesito una libreria de aqui dentro
    Category: Other systems Upload User:ayqaqa Size:15K
  • [Visual C++ (VC++)] clock.rar Answer the number is controlled by the main circuit and the expansion of circuit components. Priority encoder circuit, latch, decoder circuit will be teams of the input signal in the display output with control circuitry and the host switch alarm ...
    Category: Delphi eBooks Upload User:mary_yuxh Size:55K
  • [Visual C++ (VC++)] complier.rar FPGA realization of the conversion process cpu binary encoder, in order to realize and test the machine language to help
    Category: ActiveX-DCOM-ATL Upload User:popwhere Size:17K