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[
VHDL]
DDSsheji.rar
Recurrence of an amendment to improve the FPGA-based realization of the DDS signal source program
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[
C/C++]
9850.rar
dds program,Fioricet directory
Category:
SCM Upload User:
lhpggr Size:
1K
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[
VHDL]
dds2.rar
The same part of the logic analyzer in VHDL hardware description language modules do DDS,
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[
C/C++]
DDS_V1.5.rar
Written in 2812 with their own and have a phase shifter DDS source code
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[
VHDL]
vhdl_dds.rar
VHDL language using a simple DDS, easy to adjust the frequency and phase sine wave
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[
VHDL]
DDSyuanma.rar
DDS Waveform Generator (Synplify pro compiler through)- the output frequency Fout = Fclk* 2 ^ M/2 ^ N- Resolution Fclk/2 ^ N- the maximum output frequency Fout = Fclk* 50 (theoretical value, the sampling theorem)
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PDF]
AD9851.rar
AD9851 introduced the use of, DDS technology development manual
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C/C++]
51basedDDSsignal.rar
dds signals, based on 51 single-chip system, can generate the following 1KHz sinusoidal signal
Category:
SCM Upload User:
hc85535478 Size:
64K
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[
VHDL]
dual_ram.rar
FPGA and dual-port RAM of the DDS Arbitrary Waveform Generator
Category:
SCM Upload User:
shzunma Size:
501K
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