切换至中文 Over 1 million code package, 10 million code file free download
  • [Others] Jam_n_TermometerwithATMEGA16_DS1820andDS1307.zip this is a source code digital clock and thermometer with AVR ATMEGA 16
    Category: MultiLanguage Upload User:yanoll Size:108K
  • [VHDL] vhdl-clock.rar Digital Clock Design of VHDL course of a few key points related to one of those who every minute frequency module module module module scan
    Category: VHDL-FPGA-Verilog Upload User:szdzxd Size:104K
  • [C/C++] rtc_ds1337.rar programming for PIC 16f877a Real Time clock , LCD
    Category: SCM Upload User:fjjx0515 Size:97K
  • [C/C++] bomb.rar source code for microchip 8 bit architecture microcontroller, created for a general pourpose timer/clock with 7 segment display, it use 2 internal timer interrupts. Build with CCS C compiler.
    Category: ARM-PowerPC-ColdFire-MIPS Upload User:szhopehing Size:4K
  • [C/C++] testXES20090421.rar ... Code Warrior 5.0 Target: MC9S12XS128 Crystal: 16.000Mhz ============================================ This procedure includes the following features: 1. Set the system clock in the under xxMHZ bus clock 2. Testing Long Hill minimum system ...
    Category: SCM Upload User:szjoy168 Size:443K
  • [Asm] AT89C2051clock.zip 8051 digital clock perfect example
    Category: Other windows programs Upload User:lifahe Size:525K
  • [Visual C++ (VC++)] Horloge.rar Analog Clock Control
    Category: GUI Develop Upload User:dinghaosmt Size:55K
  • [Others] divide_by_3.zip This module divides the input clock frequency by 3.
    Category: VHDL-FPGA-Verilog Upload User:vweilai Size:1K
  • [Asm] dianziqin.rar In accordance with the note to set the frequency and 8253 timer/counter of delay time. 8253 s CLK0 then 1MHz clock, GATE0 then 5 V, OUT0 then 8255 the PA0, J1 next speaker, programming the computer as the number keys 1,2,3,4,5,6,7 flower button, press ...
    Category: Other systems Upload User:ahhairan Size:129K
  • [Objective-C] 2004818105518701.rar ... pin: Pin Signal Description Port 1: VDD Power Input. Logic supply voltage range VDD to GND: 2.7 to 3.3 V 2: SCLK Serial clock. Input for the clock signal: 0.0 to 4.0 Mbits/s. 3: SDIN Serial data. Input for the data line. 4: D/C Mode Select. To select ...
    Category: SCM Upload User:xsywcn Size:3K