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Others]
CLOCK.rar
Can achieve real-time adjustments to time, by six minutes and seconds when the LED display clock, connect a simple
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SCM Upload User：
huanghe371 Size：
97K
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Visual C++ (VC++)]
clock.rar
With VC++ Prepared synchronous digital clock, source code can be directly used for the study of people VC programming interface very good
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MultiPlatform]
clock.rar
Digital clock for the MCU C language programming, you can use the savings for the learning
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C/C++]
QT.rar
clock QT programming if there are many examples. Email Contact
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Visual C++ (VC++)]
Clock-system.rar
Simple clock system, electronic clock and digital clock size, color and the color can be changed, if you want to make the system more in line with your purpose, you can add text on its own functions and button options.
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VHDL]
CORDIC_ip.rar
... Number of Cordic Stages All designs are pipelined with a synchronous enable and reset. The pipeline latency equals 2 clock cycles plus the number of cordic stages. The configuration parameters are coded in the file names: cf_cordic_r_32_16_12.vr: Cordic ...
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C/C++]
Clock.rar
This is a language with c and password with alarm clock screen saver has been running successfully
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VHDL]
clock.rar
I have written a Verilog clock procedures, in Xilinx s ISE simulation through
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Visual C++ (VC++)]
CLOCK.rar
c++ clock, is that simple. Members can download. Learning c++ Necessary
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sifulida Size：
661K
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