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  • [Asm] clock.rar ... , as well as year, month, day to decimal separated (5) shows that the Gregorian calendar date (6 ) to the calibration date (7) Sports Stopwatch (8), alarm clock function (9) The whole point timekeeping function (10) Auto/Manual to enter hibernation
    Category: assembly language Upload User:sales1818 Size:6K
  • [Asm] CLOCK-MINE.rar Realize the single-chip electronic bell, where the time clock chip with a more accurate, LCD interface more user-friendly
    Category: assembly language Upload User:workhx Size:10K
  • [C/C++] CLOCK.rar Based on MCS-51 single-chip digital clock C Language Program
    Category: SCM Upload User:jiayuled Size:9K
  • [Others] clock.rar KEIL in the electronic clock source, you can simulate KEIL realize electronic clock
    Category: SCM Upload User:xf4461 Size:7K
  • [C/C++] clock.rar Use DS1302+ 12864 LCD+ Infra-red remote control, wireless remote control to change settings all the time. Including year, month, date, etc. The digital clock procedures ~
    Category: SCM Upload User:info360 Size:37K
  • [C/C++] LPC214X.zip ... header files, processor specific setup module, generic interrupt related APIs, timer routine, and scatter loading file. The peripheral directories include, GPIO, PWM, Real-time clock, timer, SPI, I2C, Watchdog timer, UART, external interrupt, etc.
    Category: SCM Upload User:biyongli Size:122K
  • [C/C++] clock.rar Verilog clock control procedures to prepare, in the Xilinx chip development. Anti-shake, such as with the case considered
    Category: Communication Document Upload User:sztsgg Size:10K
  • [Windows_Unix] electronicbellclock.rar use VHDL to achieve an electronic clock, the time can be set aside. Hours, minutes and seconds. Experiments can be downloaded to the box to run test.
    Category: VHDL-FPGA-Verilog Upload User:osmingled Size:345K
  • [C/C++] clock.rar With ds18b20+ Ds1302+ 89s52 make clock
    Category: SCM Upload User:qiye66669 Size:69K
  • [VHDL] clock.rar dp_xiliux the CPLD Verilog design experiments, clock demo. code test.
    Category: VHDL-FPGA-Verilog Upload User:tfsbgs Size:79K