切换至中文 Over 1 million code package, 10 million code file free download
  • [Windows_Unix] format1.rar a type of ppt format.
    Category: Other systems Upload User:hjdz18 Size:1111K
  • [Matlab] cacode.zip GPS C/A code signal genration
    Category: GPS develop Upload User:xhyu06 Size:1K
  • [Visual C++ (VC++)] 5.2.rar This application not only demonstrates the basics of using the Microsoft Foundation classes but is also a starting point for writing your application.
    Category: GIS program Upload User:kelungde Size:286K
  • [TEXT] 55645.rar ... method one example of the procedure, limit the Deputy filter/* A value can be adjusted according to the actual value for the ... procedures for the effective return of the actual value* /# define A 10 char value char filter () (char new_value new_value = ...
    Category: Communication-Mobile Upload User:yuantengcc Size:3K
  • [C/C++] pendu_siteduzero.zip a game on console ( the hanged )
    Category: Console Upload User:llllgyitx Size:9K
  • [VHDL] VHDLexample.rar here is a VHDL example
    Category: VHDL-FPGA-Verilog Upload User:free59 Size:1K
  • [VHDL] DM.rar here is a VHDL example
    Category: source in ebook Upload User:ff8588 Size:1K
  • [Others] disk.rar ... and modular design of a 80x86 assembler. It supports the objectives of a significant number of file formats, including Linux and NetBSD/FreeBSD, a.out, ELF, COFF, Microsoft 16-bit OBJ and Win32. It can also output plain binary files. It' s designed to ...
    Category: Linux-Unix program Upload User:zrm840617 Size:581K
  • [Matlab] Unified.rar Fractional order unified chaotic system discrete algorithm-This the program for fractional order Unified system, a simple but fastmethod in time domain.
    Category: Mathimatics-Numerical algorithms Upload User:szhf331 Size:1K
  • [MultiPlatform] VHDLwithaFastFourierTransformpapers.Zip VHDL with a Fast Fourier Transform papers, including the principle of analysis and implementation of the code, the Mahatma Gandhi Institute of the University of Marat
    Category: VHDL-FPGA-Verilog Upload User:tengzhen04 Size:62K