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keyword: VHDL

  • [VHDL] fpu.rar Described in VHDL language using single-precision floating-point processor. Web site source code from abroad. Can be achieved single precision floating point addition and subtraction, multiplication.
    Category: VHDL-FPGA-Verilog Upload User：cnsry2001 Size：16K
  • [VHDL] 08_VHDL_simulation2.rar Taiwanese Liang-chi written in VHDL programming learning PPT lectures, which include the contents of D flip-flops, registers, accumulators, counters, finite state machine such as a very useful content.
    Category: VHDL-FPGA-Verilog Upload User：amei06 Size：674K
  • [VHDL] VHDL_1.rar The use of hardware description language HDL design hardware circuits, Taiwan, written by PPT notes, very good. VHDL hardware design entry-learning. VHDL basic grammar structure, VHDL Parts Library (Library) and packaging (Package) and so on.
    Category: VHDL-FPGA-Verilog Upload User：shh7308 Size：18K
  • [VHDL] 100vhdl.rar 100 VHDL little practice, previously found from the Internet, and show it to everyone to share
    Category: VHDL-FPGA-Verilog Upload User：ly_hkkj Size：231K
  • [VHDL] uart.rar Serial communication protocol, you can build your project, and then need VHDL text, added to the project, understand the procedures in the simulation!
    Category: VHDL-FPGA-Verilog Upload User：sellorder Size：10K
  • [VHDL] VHDL-XILINX-EXAMPLE26.rar
    Category: VHDL-FPGA-Verilog Upload User：sandy_zbh Size：3602K
  • [VHDL] VHDL1.rar VHDL study, the Taiwanese version of, well, learn quickly, ah ah
    Category: VHDL-FPGA-Verilog Upload User：wanbofeng Size：547K
  • [VHDL] 8b_10b.rar VHDL prepared, 8b-10b codec design Encoder: 8b/10b Encoder (file: 8b10b_enc.vhd) Synchronous clocked inputs (latched on each clock rising edge) 8-bit parallel unencoded data input KI input selects data or control encoding Asynchronous active high reset ...
    Category: VHDL-FPGA-Verilog Upload User：kunlilove Size：71K
  • [VHDL] VHDL________.rar VHDL programming samples WORD DOC FILE
    Category: VHDL-FPGA-Verilog Upload User：kittypts Size：4K
  • [VHDL] erweiDCT.rar A one-dimensional DCT to improve program design and implementation using VHDL realize, DCT and IDCT
    Category: VHDL-FPGA-Verilog Upload User：gkjryjy Size：127K