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Unix_Linux]
CAN.rar
CAN cards introduce the main driver of the design and realization of its read and write operations and the related principle.
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VHDL]
dianzishejidasai.rar
2003 National Design Competition Electronics subject analysis, including simple frequency meter, phase meter and so on.
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Visual Basic (VB)]
xinxiguanli.rar
Information Management System! Graduation design a full set! Have papers, the source code! And experience, the title of the report!
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PDF]
ptr4000.rar
PTR4000 robot soccer based on wireless communication sub-system design
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PDF]
dpll_fpga.rar
FPGA-based design of digital phase-locked loop, a by the differential ahead of/lag type seizure constitutes a digital phase-locked loop phase of the Verilog-HDL modeling program
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WORD]
MSP430F2012andIA4420.rar
An active RFID tag design, the realization of the active RFID tag of the low-cost, long-range, anti-collision, battery-powered, long-life.
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Others]
biyesheji.rar
Undergraduate thesis latest reference to the 2008 session of outstanding undergraduate thesis graduation project please refer to the revised publication
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VHDL]
Asyn_FIFO_Design.rar
Asynchronous FIFO design documentation, as well as the need to pay attention to source code (in the text have). Is a standard asynchronous FIFO, can be integrated.
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VHDL]
multiplier_8bit.rar
Asynchronous FIFO design documentation, as well as the need to pay attention to source code (in the text have). Is a standard asynchronous FIFO, can be integrated.
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