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  • [C/C++] ad9850test.rar This procedure for the single-chip control ad9850 DDS have 1 ~ 20MHZ arbitrary value of sine wave frequency of the procedure can be completed by modifying the frequency of subroutine parameter settings.
    Category: SCM Upload User:qisheng818 Size:1K
  • [C/C++] ad9850test.rar SCM ad9850 DDS Sweep 100_100kHZ procedures, can be sent directly to modify the word frequency sweep range.
    Category: SCM Upload User:hxhk2008 Size:1K
  • [VHDL] learn_dds.rar Quartus ii 9.0 Based on dds simple waveform generator can produce sine, square, triangle wave can be amplitude, frequency can be. Very suitable for learning to use, when used by their chip and pin set
    Category: VHDL-FPGA-Verilog Upload User:tisogo9 Size:715K
  • [VHDL] dds9851.rar ... which is part of a micro-computer control, Direct Digital Synthesis (DDS) of the digital part of PLL frequency synthesizer, backlit liquid ... to operate and clear, increase in the number of features. DDS through start after the memory cache after the data to ...
    Category: Project Manage Upload User:cy65640317 Size:456K
  • [VHDL] dds_mine.rar This is based on verilog for dds system design, relatively simple, hope for all of us! ! !
    Category: VHDL-FPGA-Verilog Upload User:yujian514 Size:477K
  • [C/C++] xinhaofashengqi.rar Dedicated DDS chip AD9851 produced using sine, square, triangle and other waveform amplified by the programmable amplifier output, input under the control of the microcontroller through D/A converter AD9851, after controlling the type of waveforms ...
    Category: SCM Upload User:wenjun Size:61K
  • [VHDL] ask.rar The DDS with a simple way to generate the waveform modulation ASK, PSK, FSK, make it more simple modulation
    Category: SCM Upload User:newxcj Size:103K
  • [VHDL] DDS_FINAL.zip ... Synthesiser using Verilog HDL.This project is doing by me on july 2009 in summer training at NIT Kurukshetra, India. This DDS system generate the square wave, Triangular wave,Sine wave and saw wave with different frequency. We can change the frequency ...
    Category: VHDL-FPGA-Verilog Upload User:chorbr Size:427K
  • [Visual C++ (VC++)] xinhao.c.rar dds c program
    Category: SCM Upload User:huquan919 Size:2K
  • [VHDL] AD9851_VERILOG.rar A DDS chip AD9851' s VERILOG program, plus 74HC574 latch!
    Category: Other systems Upload User:dxpbzb Size:1K