-
-
[
Others]
cpu.rar
This course is primarily designed to solve using CPLD chip programming, the realization of the basic model of the CPU ... modules, micro-program controller also used the experiment to provide circuit board modules, CPU modules all remaining write in CPLD.
-
[
Windows_Unix]
clkgen.rar
CPLD with minimal resources, using Verilog in QuartusII7.1 to achieve the 1280 frequency.
Category:
Editor Upload User：
ccxgwzp Size：
598K
-
[
WORD]
Timing.rar
<System timing based on the theory. Doc>, 9 page, though brief, but its text, its map and its formula can be seen is the CPLD/FPGA design courses.
-
[
WORD]
FPGA.rar
System FPGA technology, the adoption of VHDL programming, to achieve in the CPLD. The basic principles of flower is the corresponding frequency of each note will be the frequency of enlarged issued after the driver speaker audio. Playing the organ, ...
-
[
LabView]
vhdlkey7279.rar
cpld, the environment is quartusii in VHDL language to develop reading and writing 7279 keyboard program
-
[
Windows_Unix]
VerilogHDL_alarmclock.rar
Using Verilog HDL language, multi-function digital clock, including the four functions: the time display and settings, stopwatch, alarm clock, date display and settings, the source code for the FPGA and CPLD learner has high values,
-
-
[
Others]
fip.rar
Access through the PC104 memory address, memory address the need for choice, need to do address CPLD logic transformation. This is the completion of this function. Simple.
-
-
[
Others]
g.rar
This is a matter of CPLD-based multi-channel SPWM Controller papers, please download a lot, top up
切换至中文 Over 1 million code package, 10 million code file free download 
