频率 code resource search result, page 70, Verysource

[Visual C++ (VC++)] toolbartoolbar.Rar toolbar Additions, closed analog tape recorders different frequencies own definition of new features relatively simple toolbar familiar with the operation
Category: Multimedia Develop Upload User：szrht88 Size：39K
[Visual C++ (VC++)] CpuTick.rar detection Pentium CPU clock frequency, using high precision display.
Category: Windows Kernel Upload User：jiandou Size：17K
[Visual Basic (VB)] Detectcpu11.rar the code used several categories, the computer can access the CPU information, including CPU frequency, type, manufacturer, two cache, CPU technical features, register all locations. Do not use Microsoft's WMI programming library
Category: Windows Kernel Upload User：steady_lq Size：37K
[Windows_Unix] second&clk.rar Development system using the clock signal frequency is 20MHz, the design can be counter to its count, including seconds, minutes, hours, days, weeks, months and years. At every level to show the output, thus constitutes an electronic calendar and clock ...
Category: VHDL-FPGA-Verilog Upload User：kexinmy Size：329K
[Windows_Unix] Music_altera.rar Uses Verilog the HDL design, development board realizes in Altera on the EP1S10S780C6 selects 6MHz is the datum frequency, the performance is Liang wishes the music
Category: VHDL-FPGA-Verilog Upload User：zghu2004 Size：637K
[C++ Builder] Compiles with Socket through the network data ac Compiles with Socket through the network data acquisition procedure, after the customer end and the server connection, may (develop version) through the establishment frequency gathering server end data
Category: WinSock-NDIS Upload User：kangday008 Size：35K
[C/C++] pitchshift.rar by changing the frequency to change the tone music, or transfer or demotion can. Another phase shifter (phaser.c) and RP (reverse.c) 2 source files
Category: Audio program Upload User：weiyeled Size：12K
[MultiPlatform] FrequencyGenerator.rar A frequency generator wirriten by VHDL, which can generate different frequecies.
Category: VHDL-FPGA-Verilog Upload User：icamtech08 Size：1K
[C/C++] watchdogexperiment.Rar document functional 44binit.s---- interrupted initialization, memory, stack, system initialization and establish procedures C runtime environment. Mencfg.s----- defined parameters such as memory latency option.s----- definition of system clock frequency ...
Category: Embeded Linux Upload User：upmary Size：91K
[MultiPlatform] dds_quicklogic.rar direct frequency synthesis, pioneered provide some source document is dedicated ESP
Category: VHDL-FPGA-Verilog Upload User：lion_hlc Size：67K

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