VHDL-FPGA-Verilog

Development Platform:

VHDL

prev_cmp_I8253f.qmsg：Code Content

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 151 09/26/2007 SJ Full Version " "Info: Version 7.2 Build 151 09/26/2007 SJ Full Version" { } { } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Mon Apr 19 14:43:25 2010 " "Info: Processing started: Mon Apr 19 14:43:25 2010" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off I8253f -c I8253f " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off I8253f -c I8253f" { } { } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "I8253f.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file I8253f.v" { { "Info" "ISGN_ENTITY_NAME" "1 I8253f " "Info: Found entity 1: I8253f" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 1 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "I8253f " "Info: Elaborating entity "I8253f" for the top level hierarchy" { } { } 0 0 "Elaborating entity "%1!s!" for the top level hierarchy" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 I8253f.v(79) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(79): truncated value with size 32 to match size of target (1)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 79 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 I8253f.v(85) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(85): truncated value with size 32 to match size of target (1)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 85 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 I8253f.v(86) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(86): truncated value with size 32 to match size of target (1)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 86 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 I8253f.v(88) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(88): truncated value with size 32 to match size of target (1)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 88 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 I8253f.v(89) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(89): truncated value with size 32 to match size of target (1)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 89 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "datain I8253f.v(112) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(112): variable "datain" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 112 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "write1 I8253f.v(96) " "Warning (10240): Verilog HDL Always Construct warning at I8253f.v(96): inferring latch(es) for variable "write1", which holds its previous value in one or more paths through the always construct" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 96 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable "%1!s!", which holds its previous value in one or more paths through the always construct" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "write2 I8253f.v(96) " "Warning (10240): Verilog HDL Always Construct warning at I8253f.v(96): inferring latch(es) for variable "write2", which holds its previous value in one or more paths through the always construct" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 96 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable "%1!s!", which holds its previous value in one or more paths through the always construct" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "read0 I8253f.v(96) " "Warning (10240): Verilog HDL Always Construct warning at I8253f.v(96): inferring latch(es) for variable "read0", which holds its previous value in one or more paths through the always construct" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 96 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable "%1!s!", which holds its previous value in one or more paths through the always construct" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "read1 I8253f.v(96) " "Warning (10240): Verilog HDL Always Construct warning at I8253f.v(96): inferring latch(es) for variable "read1", which holds its previous value in one or more paths through the always construct" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 96 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable "%1!s!", which holds its previous value in one or more paths through the always construct" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "read2 I8253f.v(96) " "Warning (10240): Verilog HDL Always Construct warning at I8253f.v(96): inferring latch(es) for variable "read2", which holds its previous value in one or more paths through the always construct" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 96 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable "%1!s!", which holds its previous value in one or more paths through the always construct" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "cmd I8253f.v(96) " "Warning (10240): Verilog HDL Always Construct warning at I8253f.v(96): inferring latch(es) for variable "cmd", which holds its previous value in one or more paths through the always construct" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 96 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable "%1!s!", which holds its previous value in one or more paths through the always construct" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "cnt0 I8253f.v(146) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(146): variable "cnt0" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 146 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "cnt1 I8253f.v(148) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(148): variable "cnt1" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 148 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "cnt2 I8253f.v(150) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(150): variable "cnt2" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 150 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "cmd0 I8253f.v(142) " "Warning (10240): Verilog HDL Always Construct warning at I8253f.v(142): inferring latch(es) for variable "cmd0", which holds its previous value in one or more paths through the always construct" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 142 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable "%1!s!", which holds its previous value in one or more paths through the always construct" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "cmd1 I8253f.v(142) " "Warning (10240): Verilog HDL Always Construct warning at I8253f.v(142): inferring latch(es) for variable "cmd1", which holds its previous value in one or more paths through the always construct" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 142 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable "%1!s!", which holds its previous value in one or more paths through the always construct" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "cmd2 I8253f.v(142) " "Warning (10240): Verilog HDL Always Construct warning at I8253f.v(142): inferring latch(es) for variable "cmd2", which holds its previous value in one or more paths through the always construct" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 142 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable "%1!s!", which holds its previous value in one or more paths through the always construct" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "lock I8253f.v(142) " "Warning (10240): Verilog HDL Always Construct warning at I8253f.v(142): inferring latch(es) for variable "lock", which holds its previous value in one or more paths through the always construct" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 142 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable "%1!s!", which holds its previous value in one or more paths through the always construct" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 2 I8253f.v(187) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(187): truncated value with size 32 to match size of target (2)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 187 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 2 I8253f.v(197) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(197): truncated value with size 32 to match size of target (2)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 197 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 I8253f.v(205) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(205): truncated value with size 32 to match size of target (16)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 205 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "cnt1 I8253f.v(211) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(211): variable "cnt1" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 211 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 I8253f.v(211) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(211): truncated value with size 32 to match size of target (1)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 211 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "cnt1 I8253f.v(212) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(212): variable "cnt1" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 212 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 I8253f.v(212) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(212): truncated value with size 32 to match size of target (1)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 212 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "cnt1 I8253f.v(213) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(213): variable "cnt1" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 213 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 I8253f.v(213) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(213): truncated value with size 32 to match size of target (1)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 213 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "cnt1 I8253f.v(214) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(214): variable "cnt1" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 214 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "set1 I8253f.v(214) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(214): variable "set1" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 214 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 I8253f.v(214) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(214): truncated value with size 32 to match size of target (1)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 214 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "cnt1 I8253f.v(215) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(215): variable "cnt1" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 215 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 I8253f.v(215) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(215): truncated value with size 32 to match size of target (1)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 215 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "cnt1 I8253f.v(216) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(216): variable "cnt1" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 216 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 I8253f.v(216) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(216): truncated value with size 32 to match size of target (1)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 216 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_INCOMPLETE_CASE_STATEMENT" "I8253f.v(210) " "Warning (10270): Verilog HDL Case Statement warning at I8253f.v(210): incomplete case statement has no default case item" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 210 0 0 } } } 0 10270 "Verilog HDL Case Statement warning at %1!s!: incomplete case statement has no default case item" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "clk_out I8253f.v(208) " "Warning (10240): Verilog HDL Always Construct warning at I8253f.v(208): inferring latch(es) for variable "clk_out", which holds its previous value in one or more paths through the always construct" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 208 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable "%1!s!", which holds its previous value in one or more paths through the always construct" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 2 I8253f.v(242) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(242): truncated value with size 32 to match size of target (2)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 242 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 2 I8253f.v(252) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(252): truncated value with size 32 to match size of target (2)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 252 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 I8253f.v(260) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(260): truncated value with size 32 to match size of target (16)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 260 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "cnt0 I8253f.v(266) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(266): variable "cnt0" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 266 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 I8253f.v(266) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(266): truncated value with size 32 to match size of target (1)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 266 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "cnt0 I8253f.v(267) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(267): variable "cnt0" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 267 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 I8253f.v(267) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(267): truncated value with size 32 to match size of target (1)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 267 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "cnt0 I8253f.v(268) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(268): variable "cnt0" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 268 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 I8253f.v(268) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(268): truncated value with size 32 to match size of target (1)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 268 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "cnt0 I8253f.v(269) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(269): variable "cnt0" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 269 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "set0 I8253f.v(269) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(269): variable "set0" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 269 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 I8253f.v(269) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(269): truncated value with size 32 to match size of target (1)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 269 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "cnt0 I8253f.v(270) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(270): variable "cnt0" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 270 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 I8253f.v(270) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(270): truncated value with size 32 to match size of target (1)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 270 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "cnt0 I8253f.v(271) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(271): variable "cnt0" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 271 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 I8253f.v(271) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(271): truncated value with size 32 to match size of target (1)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 271 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_INCOMPLETE_CASE_STATEMENT" "I8253f.v(265) " "Warning (10270): Verilog HDL Case Statement warning at I8253f.v(265): incomplete case statement has no default case item" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 265 0 0 } } } 0 10270 "Verilog HDL Case Statement warning at %1!s!: incomplete case statement has no default case item" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "clk_out I8253f.v(263) " "Warning (10240): Verilog HDL Always Construct warning at I8253f.v(263): inferring latch(es) for variable "clk_out", which holds its previous value in one or more paths through the always construct" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 263 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable "%1!s!", which holds its previous value in one or more paths through the always construct" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 2 I8253f.v(297) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(297): truncated value with size 32 to match size of target (2)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 297 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 2 I8253f.v(307) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(307): truncated value with size 32 to match size of target (2)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 307 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 I8253f.v(315) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(315): truncated value with size 32 to match size of target (16)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 315 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "cnt2 I8253f.v(321) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(321): variable "cnt2" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 321 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 I8253f.v(321) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(321): truncated value with size 32 to match size of target (1)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 321 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "cnt2 I8253f.v(322) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(322): variable "cnt2" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 322 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 I8253f.v(322) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(322): truncated value with size 32 to match size of target (1)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 322 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "cnt2 I8253f.v(323) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(323): variable "cnt2" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 323 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 I8253f.v(323) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(323): truncated value with size 32 to match size of target (1)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 323 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "cnt2 I8253f.v(324) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(324): variable "cnt2" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 324 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "set2 I8253f.v(324) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(324): variable "set2" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 324 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 I8253f.v(324) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(324): truncated value with size 32 to match size of target (1)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 324 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "cnt2 I8253f.v(325) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(325): variable "cnt2" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 325 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 I8253f.v(325) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(325): truncated value with size 32 to match size of target (1)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 325 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "cnt2 I8253f.v(326) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(326): variable "cnt2" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 326 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 I8253f.v(326) " "Warning (10230): Verilog HDL assignment warning at I8253f.v(326): truncated value with size 32 to match size of target (1)" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 326 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_INCOMPLETE_CASE_STATEMENT" "I8253f.v(320) " "Warning (10270): Verilog HDL Case Statement warning at I8253f.v(320): incomplete case statement has no default case item" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 320 0 0 } } } 0 10270 "Verilog HDL Case Statement warning at %1!s!: incomplete case statement has no default case item" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "clk_out I8253f.v(318) " "Warning (10240): Verilog HDL Always Construct warning at I8253f.v(318): inferring latch(es) for variable "clk_out", which holds its previous value in one or more paths through the always construct" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 318 0 0 } } } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable "%1!s!", which holds its previous value in one or more paths through the always construct" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "write0 I8253f.v(334) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(334): variable "write0" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 334 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "cmd0 I8253f.v(336) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(336): variable "cmd0" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 336 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "datain I8253f.v(339) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(339): variable "datain" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 339 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "datain I8253f.v(345) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(345): variable "datain" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 345 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "wlh0 I8253f.v(350) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(350): variable "wlh0" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 350 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "datain I8253f.v(351) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(351): variable "datain" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 351 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "wlh0 I8253f.v(352) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(352): variable "wlh0" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 352 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "datain I8253f.v(354) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(354): variable "datain" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 354 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_INCOMPLETE_CASE_STATEMENT" "I8253f.v(336) " "Warning (10270): Verilog HDL Case Statement warning at I8253f.v(336): incomplete case statement has no default case item" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 336 0 0 } } } 0 10270 "Verilog HDL Case Statement warning at %1!s!: incomplete case statement has no default case item" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "wover0 I8253f.v(360) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(360): variable "wover0" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 360 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "write1 I8253f.v(369) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(369): variable "write1" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 369 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "cmd1 I8253f.v(371) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(371): variable "cmd1" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 371 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "datain I8253f.v(374) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(374): variable "datain" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 374 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "datain I8253f.v(380) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(380): variable "datain" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 380 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "wlh1 I8253f.v(385) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(385): variable "wlh1" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 385 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "datain I8253f.v(386) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(386): variable "datain" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 386 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "wlh1 I8253f.v(387) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(387): variable "wlh1" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 387 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "datain I8253f.v(389) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(389): variable "datain" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 389 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VERI_INCOMPLETE_CASE_STATEMENT" "I8253f.v(371) " "Warning (10270): Verilog HDL Case Statement warning at I8253f.v(371): incomplete case statement has no default case item" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 371 0 0 } } } 0 10270 "Verilog HDL Case Statement warning at %1!s!: incomplete case statement has no default case item" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_INCOMPLETE_SENSITIVITY_LIST" "wover1 I8253f.v(395) " "Warning (10235): Verilog HDL Always Construct warning at I8253f.v(395): variable "wover1" is read inside the Always Construct but isn't in the Always Construct's Event Control" { } { { "I8253f.v" "" { Text "C:/altera/72/quartus/exp3/I8253f/I8253f.v" 395 0 0 } } } 0 10235 "Verilog HDL Always Construct warning at %2!s!: variable "%1!s!" is read inside the Always Construct but isn't in the Always Construct's Event Control" 0 0 "" 0}