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I8253f.asm.rpt
Package: 8253.rar　[view]
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Upload Date: 2022-08-10
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Code Size: 8k
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VHDL-FPGA-Verilog

Development Platform:

VHDL

I8253f.asm.rpt：Code Content
  1. Assembler report for I8253f
  2. Mon Apr 19 14:43:59 2010
  3. Quartus II Version 7.2 Build 151 09/26/2007 SJ Full Version
  6. ---------------------
  7. ; Table of Contents ;
  8. ---------------------
  9.   1. Legal Notice
  10.   2. Assembler Summary
  11.   3. Assembler Settings
  12.   4. Assembler Generated Files
  13.   5. Assembler Device Options: C:/altera/72/quartus/exp3/I8253f/I8253f.sof
  14.   6. Assembler Device Options: C:/altera/72/quartus/exp3/I8253f/I8253f.pof
  15.   7. Assembler Messages
  19. ----------------
  20. ; Legal Notice ;
  21. ----------------
  22. Copyright (C) 1991-2007 Altera Corporation
  23. Your use of Altera Corporation's design tools, logic functions 
  24. and other software and tools, and its AMPP partner logic 
  25. functions, and any output files from any of the foregoing 
  26. (including device programming or simulation files), and any 
  27. associated documentation or information are expressly subject 
  28. to the terms and conditions of the Altera Program License 
  29. Subscription Agreement, Altera MegaCore Function License 
  30. Agreement, or other applicable license agreement, including, 
  31. without limitation, that your use is for the sole purpose of 
  32. programming logic devices manufactured by Altera and sold by 
  33. Altera or its authorized distributors.  Please refer to the 
  34. applicable agreement for further details.
  38. +---------------------------------------------------------------+
  39. ; Assembler Summary                                             ;
  40. +-----------------------+---------------------------------------+
  41. ; Assembler Status      ; Successful - Mon Apr 19 14:43:59 2010 ;
  42. ; Revision Name         ; I8253f                                ;
  43. ; Top-level Entity Name ; I8253f                                ;
  44. ; Family                ; Stratix II                            ;
  45. ; Device                ; EP2S15F484C3                          ;
  46. +-----------------------+---------------------------------------+
  49. +--------------------------------------------------------------------------------------------------------+
  50. ; Assembler Settings                                                                                     ;
  51. +-----------------------------------------------------------------------------+----------+---------------+
  52. ; Option                                                                      ; Setting  ; Default Value ;
  53. +-----------------------------------------------------------------------------+----------+---------------+
  54. ; Use smart compilation                                                       ; Off      ; Off           ;
  55. ; Maximum processors allowed for parallel compilation                         ; 1        ; 1             ;
  56. ; Generate compressed bitstreams                                              ; On       ; On            ;
  57. ; Compression mode                                                            ; Off      ; Off           ;
  58. ; Clock source for configuration device                                       ; Internal ; Internal      ;
  59. ; Clock frequency of the configuration device                                 ; 10 MHZ   ; 10 MHz        ;
  60. ; Divide clock frequency by                                                   ; 1        ; 1             ;
  61. ; JTAG user code for target device                                            ; Ffffffff ; Ffffffff      ;
  62. ; Auto user code                                                              ; Off      ; Off           ;
  63. ; Configuration device                                                        ; Auto     ; Auto          ;
  64. ; JTAG user code for configuration device                                     ; Ffffffff ; Ffffffff      ;
  65. ; Configuration device auto user code                                         ; Off      ; Off           ;
  66. ; Generate Tabular Text File (.ttf) For Target Device                         ; Off      ; Off           ;
  67. ; Generate Raw Binary File (.rbf) For Target Device                           ; Off      ; Off           ;
  68. ; Generate Hexadecimal (Intel-Format) Output File (.hexout) for Target Device ; Off      ; Off           ;
  69. ; Hexadecimal Output File start address                                       ; 0        ; 0             ;
  70. ; Hexadecimal Output File count direction                                     ; Up       ; Up            ;
  71. ; Release clears before tri-states                                            ; Off      ; Off           ;
  72. ; Auto-restart configuration after error                                      ; On       ; On            ;
  73. ; Maintain Compatibility with All Stratix II MRAM Versions                    ; Off      ; Off           ;
  74. ; Use Checkered Pattern as Uninitialized RAM Content                          ; Off      ; Off           ;
  75. ; Generate Serial Vector Format File (.svf) for Target Device                 ; Off      ; Off           ;
  76. ; Generate a JEDEC STAPL Format File (.jam) for Target Device                 ; Off      ; Off           ;
  77. ; Generate a compressed Jam STAPL Byte Code 2.0 File (.jbc) for Target Device ; Off      ; Off           ;
  78. ; Generate a compressed Jam STAPL Byte Code 2.0 File (.jbc) for Target Device ; On       ; On            ;
  79. +-----------------------------------------------------------------------------+----------+---------------+
  82. +---------------------------------------------+
  83. ; Assembler Generated Files                   ;
  84. +---------------------------------------------+
  85. ; File Name                                   ;
  86. +---------------------------------------------+
  87. ; C:/altera/72/quartus/exp3/I8253f/I8253f.sof ;
  88. ; C:/altera/72/quartus/exp3/I8253f/I8253f.pof ;
  89. +---------------------------------------------+
  92. +-----------------------------------------------------------------------+
  93. ; Assembler Device Options: C:/altera/72/quartus/exp3/I8253f/I8253f.sof ;
  94. +----------------+------------------------------------------------------+
  95. ; Option         ; Setting                                              ;
  96. +----------------+------------------------------------------------------+
  97. ; Device         ; EP2S15F484C3                                         ;
  98. ; JTAG usercode  ; 0xFFFFFFFF                                           ;
  99. ; Checksum       ; 0x002E7E31                                           ;
  100. +----------------+------------------------------------------------------+
  103. +-----------------------------------------------------------------------+
  104. ; Assembler Device Options: C:/altera/72/quartus/exp3/I8253f/I8253f.pof ;
  105. +--------------------+--------------------------------------------------+
  106. ; Option             ; Setting                                          ;
  107. +--------------------+--------------------------------------------------+
  108. ; Device             ; EPC16                                            ;
  109. ; JTAG usercode      ; 0xFFFFFFFF                                       ;
  110. ; Checksum           ; 0x1EDA902A                                       ;
  111. ; Compression Ratio  ; 3                                                ;
  112. +--------------------+--------------------------------------------------+
  115. +--------------------+
  116. ; Assembler Messages ;
  117. +--------------------+
  118. Info: *******************************************************************
  119. Info: Running Quartus II Assembler
  120.     Info: Version 7.2 Build 151 09/26/2007 SJ Full Version
  121.     Info: Processing started: Mon Apr 19 14:43:51 2010
  122. Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off I8253f -c I8253f
  123. Info: Writing out detailed assembly data for power analysis
  124. Info: Assembler is generating device programming files
  125. Info: Quartus II Assembler was successful. 0 errors, 0 warnings
  126.     Info: Allocated 195 megabytes of memory during processing
  127.     Info: Processing ended: Mon Apr 19 14:43:59 2010
  128.     Info: Elapsed time: 00:00:08