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os_cpu.h
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ARM-PowerPC-ColdFire-MIPS

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C/C++

os_cpu.h：Code Content
  1. /*
  2. *********************************************************************************************************
  3. *                                               uC/OS-II
  4. *                                         The Real-Time Kernel
  5. *
  6. *
  7. *                             (c) Copyright 1992-2004, Micrium, Weston, FL
  8. *                                          All Rights Reserved
  9. *
  10. *                                           Generic ARM Port
  11. *
  12. * File      : OS_CPU.H
  13. * Version   : V1.60
  14. * By        : Jean J. Labrosse
  15. *
  16. * For       : ARM7 or ARM9
  17. * Mode      : ARM or Thumb
  18. * Toolchain : ARM Developer Suite Version 1.2 and higher
  19. *********************************************************************************************************
  20. */
  22. #ifndef  OS_CPU_H
  23. #define  OS_CPU_H
  26. #ifdef   OS_CPU_GLOBALS
  27. #define  OS_CPU_EXT
  28. #else
  29. #define  OS_CPU_EXT  extern
  30. #endif
  32. /*
  33. *********************************************************************************************************
  34. *                                   INTERRUPT DISABLE TIME MEASUREMENT
  35. *********************************************************************************************************
  36. */
  38. #define  OS_CPU_INT_DIS_MEAS_EN    0
  40. /*
  41. *********************************************************************************************************
  42. *                                              DATA TYPES
  43. *                                         (Compiler Specific)
  44. *********************************************************************************************************
  45. */
  47. typedef unsigned char  BOOLEAN;
  48. typedef unsigned char  INT8U;                    /* Unsigned  8 bit quantity                           */
  49. typedef signed   char  INT8S;                    /* Signed    8 bit quantity                           */
  50. typedef unsigned short INT16U;                   /* Unsigned 16 bit quantity                           */
  51. typedef signed   short INT16S;                   /* Signed   16 bit quantity                           */
  52. typedef unsigned long  INT32U;                   /* Unsigned 32 bit quantity                           */
  53. typedef signed   long  INT32S;                   /* Signed   32 bit quantity                           */
  54. typedef float          FP32;                     /* Single precision floating point                    */
  55. typedef double         FP64;                     /* Double precision floating point                    */
  57. typedef unsigned int   OS_STK;                   /* Each stack entry is 32-bit wide                    */
  58. typedef unsigned int   OS_CPU_SR;                /* Define size of CPU status register (PSR = 32 bits) */
  60. /*
  61. *********************************************************************************************************
  62. *                                                ARM
  63. *
  64. * Method #1:  Disable/Enable interrupts using simple instructions.  After critical section, interrupts
  65. *             will be enabled even if they were disabled before entering the critical section.
  66. *             NOT IMPLEMENTED
  67. *
  68. * Method #2:  Disable/Enable interrupts by preserving the state of interrupts.  In other words, if
  69. *             interrupts were disabled before entering the critical section, they will be disabled when
  70. *             leaving the critical section.
  71. *             NOT IMPLEMENTED
  72. *
  73. * Method #3:  Disable/Enable interrupts by preserving the state of interrupts.  Generally speaking you
  74. *             would store the state of the interrupt disable flag in the local variable 'cpu_sr' and then
  75. *             disable interrupts.  'cpu_sr' is allocated in all of uC/OS-II's functions that need to
  76. *             disable interrupts.  You would restore the interrupt disable state by copying back 'cpu_sr'
  77. *             into the CPU's status register.
  78. *********************************************************************************************************
  79. */
  81. #define  OS_CRITICAL_METHOD    3
  84. #if      OS_CRITICAL_METHOD == 3
  86. #if      OS_CPU_INT_DIS_MEAS_EN > 0
  88. #define  OS_ENTER_CRITICAL()  {cpu_sr = OS_CPU_SR_Save();  
  89.                                OS_CPU_IntDisMeasStart();}
  90. #define  OS_EXIT_CRITICAL()   {OS_CPU_IntDisMeasStop();   
  91.                                OS_CPU_SR_Restore(cpu_sr);}
  93. #else
  95. #define  OS_ENTER_CRITICAL()  {cpu_sr = OS_CPU_SR_Save();}
  96. #define  OS_EXIT_CRITICAL()   {OS_CPU_SR_Restore(cpu_sr);}
  98. #endif
  100. #endif
  102. /*
  103. *********************************************************************************************************
  104. *                                         ARM Miscellaneous
  105. *********************************************************************************************************
  106. */
  108. #define  OS_STK_GROWTH        1                   /* Stack grows from HIGH to LOW memory on ARM        */
  110. #define  OS_TASK_SW()         OSCtxSw()
  112. /*
  113. *********************************************************************************************************
  114. *                                            GLOBAL VARIABLES
  115. *********************************************************************************************************
  116. */
  118.                                                   /* Variables used to measure interrupt disable time  */
  119. #if OS_CPU_INT_DIS_MEAS_EN > 0
  120. OS_CPU_EXT  INT16U  OS_CPU_IntDisMeasNestingCtr;
  121. OS_CPU_EXT  INT16U  OS_CPU_IntDisMeasCntsEnter;
  122. OS_CPU_EXT  INT16U  OS_CPU_IntDisMeasCntsExit;
  123. OS_CPU_EXT  INT16U  OS_CPU_IntDisMeasCntsMax;
  124. OS_CPU_EXT  INT16U  OS_CPU_IntDisMeasCntsDelta;
  125. OS_CPU_EXT  INT16U  OS_CPU_IntDisMeasCntsOvrhd;
  126. #endif
  128. /*
  129. *********************************************************************************************************
  130. *                                              PROTOTYPES
  131. *********************************************************************************************************
  132. */
  134. #if OS_CRITICAL_METHOD == 3
  135.        OS_CPU_SR  OS_CPU_SR_Save(void);           /* See OS_CPU_A.S                                    */
  136.        void       OS_CPU_SR_Restore(OS_CPU_SR cpu_sr);
  137. #endif
  138.        void       OSTimeTickISR(void);
  139.        void       OSCtxSw(void);
  140.        void       OSIntCtxSw(void);
  141.        void       OSStartHighRdy(void);
  144.        void       OSTimeTickISRHandler(void);     /* See BSP.C                                         */
  145. #if OS_CPU_INT_DIS_MEAS_EN > 0
  146.        void       OS_CPU_IntDisMeasInit(void);
  147.        void       OS_CPU_IntDisMeasStart(void);
  148.        void       OS_CPU_IntDisMeasStop(void);
  149.        INT16U     OS_CPU_IntDisMeasTmrRd(void);
  150. #endif
  152. #endif